HEF4518BT,653 NXP Semiconductors, HEF4518BT,653 Datasheet

IC BCD COUNTER DUAL 16SOIC

HEF4518BT,653

Manufacturer Part Number
HEF4518BT,653
Description
IC BCD COUNTER DUAL 16SOIC
Manufacturer
NXP Semiconductors
Series
4000Br
Datasheets

Specifications of HEF4518BT,653

Package / Case
16-SOIC (3.9mm Width)
Logic Type
BCD Counter
Direction
Up
Number Of Elements
2
Number Of Bits Per Element
4
Reset
Asynchronous
Count Rate
40MHz
Trigger Type
Positive, Negative
Voltage - Supply
4.5 V ~ 15.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Timing
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
933373230653
HEF4518BTD-T
HEF4518BTD-T
1. General description
2. Features
3. Applications
4. Ordering information
Table 1.
All types operate from
Type number
HEF4518BP
HEF4518BT
Ordering information
Package
Name
DIP16
SO16
40
The HEF4518B is a dual 4-bit internally synchronous BCD counter. The counter has an
active HIGH clock input (nCP0) and an active LOW clock input (nCP1), buffered outputs
from all four bit positions (nQ0 to nQ3) and an active HIGH overriding asynchronous
master reset input (nMR). The counter advances on either the LOW-to-HIGH transition of
the nCP0 input if nCP1 is HIGH or the HIGH-to-LOW transition of the nCP1 input if nCP0
is LOW. Either nCP0 or nCP1 may be used as the clock input to the counter and the other
clock input may be used as a clock enable input. A HIGH on nMR resets the counter (nQ0
to nQ3 = LOW) independent of nCP0, nCP1. Schmitt trigger action in the clock input
makes the circuit highly tolerant of slower clock rise and fall times.
It operates over a recommended V
(usually ground). Unused inputs must be connected to V
also suitable for use over the full industrial (−40 °C to +85 °C) temperature range.
°
C to +85
HEF4518B
Dual BCD counter
Rev. 06 — 10 December 2009
Tolerant of slow clock rise and fall times
Fully static operation
5 V, 10 V, and 15 V parametric ratings
Standardized symmetrical output characteristics
Operates across the full industrial temperature range −40 °C to +85 °C
Complies with JEDEC standard JESD 13-B
Multistage synchronous counting
Multistage asynchronous counting
Frequency dividers
Description
plastic dual in-line package; 16 leads (300 mil)
plastic small outline package; 16 leads; body width 3.9 mm
°
C
DD
power supply range of 3 V to 15 V referenced to V
DD
, V
SS
, or another input. It is
Product data sheet
Version
SOT38-4
SOT109-1
SS

Related parts for HEF4518BT,653

HEF4518BT,653 Summary of contents

Page 1

HEF4518B Dual BCD counter Rev. 06 — 10 December 2009 1. General description The HEF4518B is a dual 4-bit internally synchronous BCD counter. The counter has an active HIGH clock input (nCP0) and an active LOW clock input (nCP1), buffered ...

Page 2

... NXP Semiconductors 5. Functional diagram Fig 1. Functional diagram FF1 CP1 T C CP0 MR Fig 2. Logic diagram for one counter HEF4518B_6 Product data sheet 1 1CP0 2 1CP1 7 1MR 9 2CP0 10 2CP1 15 2MR FF2 Rev. 06 — 10 December 2009 HEF4518B Dual BCD counter 1Q0 3 1Q1 4 1Q2 5 1Q3 6 2Q0 ...

Page 3

... NXP Semiconductors 6. Pinning information 6.1 Pinning Fig 3. Pin configuration 6.2 Pin description Table 2. Pin description Symbol Pin 1CP0, 2CP0 1, 9 1CP1, 2CP1 2, 10 1Q0, 2Q0 3,11 1Q1,2Q1 4, 12 1Q2, 2Q2 5,13 1Q3, 2Q3 6, 14 1MR, 2MR HEF4518B_6 Product data sheet HEF4518B ...

Page 4

... NXP Semiconductors 7. Functional description [1] Table 3. Function table nCP0 nCP1 ↑ H ↓ L ↓ X ↑ X ↑ L ↓ HIGH voltage level LOW voltage level don’t care; ↑ = positive-going transition; ↓ = negative-going transition. [ nCP0 nCP1 nMR 1 2 nQ0 nQ1 nQ2 nQ3 Fig 4. Timing diagram ...

Page 5

... NXP Semiconductors 8. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter V supply voltage DD I input clamping current IK V input voltage I I output clamping current OK I input/output current I/O I supply current DD T storage temperature stg ...

Page 6

... NXP Semiconductors Table 6. Static characteristics …continued unless otherwise specified Symbol Parameter HIGH-level output voltage | LOW-level output voltage OL I HIGH-level output current LOW-level output current OL I input leakage current I I supply current DD C input capacitance I 11. Dynamic characteristics Table 7. Dynamic characteristics ° ...

Page 7

... NXP Semiconductors Table 7. Dynamic characteristics ° for test circuit see SS amb Symbol Parameter Conditions t pulse width nCP0 input LOW; W minimum width; see nCP1 input HIGH; minimum width; see nMR input HIGH; minimum width; see t recovery time nMR input; see rec t set-up time nCP0 to nCP1 ...

Page 8

... NXP Semiconductors 12. Waveforms V I nCP0 input nCP1 input nMR input nQn output nCP0 and nCP1 set-up times, propagation delays and output transition times (nCP0 = LOW) (nCP1 = HIGH) b. nMR recovery time, minimum nCP0, nCP1, and nMR pulse widths and maximum frequency Measurement points are given in table ...

Page 9

... NXP Semiconductors negative positive a. Input waveforms b. Test circuit Test data is given in Table 9. Definitions for test circuit Load capacitance including jig and probe capacitance Termination resistance should be equal to output impedance Z T Fig 6. Test circuit for switching times Table 9. Measurement points and test data ...

Page 10

... NXP Semiconductors 13. Package outline DIP16: plastic dual in-line package; 16 leads (300 mil pin 1 index 1 DIMENSIONS (inch dimensions are derived from the original mm dimensions UNIT b max. min. max. 1.73 mm 4.2 0.51 3.2 1.30 0.068 inches 0.17 0.02 0.13 0.051 Note 1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included. ...

Page 11

... NXP Semiconductors SO16: plastic small outline package; 16 leads; body width 3 pin 1 index 1 e DIMENSIONS (inch dimensions are derived from the original mm dimensions) A UNIT max. 0.25 1.45 mm 1.75 0.25 0.10 1.25 0.010 0.057 inches 0.069 0.01 0.004 0.049 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. ...

Page 12

... NXP Semiconductors 14. Revision history Table 10. Revision history Document ID Release date HEF4518B_6 20091210 • Modifications: Section 9 “Recommended operating conditions” HEF4518B_5 20090727 HEF4518B_4 20090703 HEF4518B_CNV_3 19950101 HEF4518B_CNV_2 19950101 HEF4518B_6 Product data sheet Data sheet status Change notice Product data sheet - Δt/ΔV values updated. ...

Page 13

... Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice ...

Page 14

... NXP Semiconductors 17. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 4 Ordering information . . . . . . . . . . . . . . . . . . . . . 1 5 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 6 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 7 Functional description . . . . . . . . . . . . . . . . . . . 4 8 Limiting values Recommended operating conditions Static characteristics Dynamic characteristics . . . . . . . . . . . . . . . . . . 6 12 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 13 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 10 14 Revision history ...

Related keywords