ST7556 Sitronix Technology, ST7556 Datasheet - Page 12
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ST7556
Manufacturer Part Number
ST7556
Description
65 x 102 Dot Matrix LCD Controller/Driver
Manufacturer
Sitronix Technology
Datasheet
1.ST7556.pdf
(43 pages)
www.DataSheet4U.com
ST7556
5. PINNING DESCRIPTIONS
LCD driver outputs
MICROPROCESSOR INTERFACE
Ver 2.2
SEG0 to SEG101
COM0 to COM64
Pin Name
COMS
RESB
TMX
TMY
CSB
IMS
P/S
I/O
O
O
O
I
I
I
I
I
I
LCD segment driver outputs
This display data and the M signal control the output voltage of segment
driver.
LCD column driver outputs
This internal scanning data and M signal control the output voltage of
common driver.
Common output for the icons
The output signals of two pins are same. When not used, this pin should
be left open.
Mirror X: SEG bi-direction selection
TMX connect to VSS (MX=0):normal direction (SEG0 SEG101)
TMX connect to VDD ( MX=1):reverse direction (SEG101 SEG0)
Mirror Y: COM bi-direction selection
TMY connect to VSS (MY=0):normal direction
TMY connect to VDD (MY=1):reverse direction
See pad center coordinates.
Microprocessor interface select input pin
P/S= "H “: parallel data input.
P/S= "L “: serial data input.
When P/S=" L ", D0 to D5 are fixed to " H ".
RD (E) and WR(R/W) are fixed to "H ".
Input mode select
Chip select input pins
Data/instruction I/O is enabled only when CSB is " L ". When chip select
is non-active, DB0 to DB7 is high impedance.
Reset input pin
When RESET is " L ", initialization is executed.
Display data
Display data
Power save mode
Power save mode
H
H
H
H
L
L
L
L
" H "
" H "
" L "
" L "
P/S
M (Internal)
M(Internal)
" H "
" H "
" L "
" L "
IMS
H
H
H
H
L
L
L
L
12/43
8080-series parallel MPU interface
4 Pin-SPI MPU interface
6800-series parallel MPU interface
Do not use
Description
Segment drover output voltage
Normal display Reverse display
Common drover output voltage
Normal display Reverse display
VLCD
V
V
V
V
SS
SS
2
3
State
VLCD
V
V
V
V
SS
SS
1
4
VLCD
V
V
V
V
SS
SS
2
3
No. of Pins
2005/10/05
102
65
1
1
2
1
1
2
1