ST7556 Sitronix Technology, ST7556 Datasheet - Page 23
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ST7556
Manufacturer Part Number
ST7556
Description
65 x 102 Dot Matrix LCD Controller/Driver
Manufacturer
Sitronix Technology
Datasheet
1.ST7556.pdf
(43 pages)
www.DataSheet4U.com
ST7556
9. INSTRUCTION DESCRIPTION
H=”0” or “1”
Reset
This instruction resets initial display line, column address, page address, and common output status select to their initial
status. This instruction cannot initialize the LCD power supply, which is initialized by the RESB pin.
Function Set
Flag
Read status byte
Indicates the internal status of the ST7556
Flag
Write data
8-bit data of Display Data from the microprocessor can be written to the RAM location specified by the column address and
page address. The column address is increased by 1 automatically so that the microprocessor can continuously write data
to the addressed page. During auto-increment, the column address wraps to 0 after the last column is written.
Ver 2.2
D2~D0 ST7556 will return the fix data “101” as identification bit
BUSY
RST
D,E
PD
PD
A0
A0
A0
A0
V
H
0
0
0
1
Description
All LCD outputs at VSS (display off), bias generator and VLCD generator off, VLCD can be
disconnected, oscillator off (external clock possible), RAM contents not cleared; RAM data
can be written.
PD=0:chip is active
PD=1:chip is in power down mode
When V = 0, the horizontal addressing is selected. The data is written into the DDRAM as
shown in Fig13.
When V = 1, the vertical addressing is selected. The data is written into the DDRAM as
shown in Fig12
When H = 0 the commands ‘ display control ’ , ‘ set Y address ’ and ‘ set X address ’
can be performed, when H = 1 the others can be executed. The commands ‘ write data ’
and ‘ function set ’ can be executed in both cases.
H=0:use basic instruction set
H=1:use extended instruction set
Description
PD=0:chip is active
PD=1:chip is in power down mode
Indicates the initialization is in progress by RESET signal
0: chip is active,1:chip is being reset
The device is busy when internal operation or reset. Any instruction is rejected until BUSY
goes LOW.
0:chip is active;1:chip is being busy
D
0
0
1
1
WR(R/W)
WR(R/W)
WR(R/W)
WR(R/W)
0
0
1
E
0
1
0
1
0
The bits D and E select the display mode.
Display blank
All display segments on
Normal mode
Inverse video mode
PD
D7
D7
D7
D7
0
0
RST
D6
D6
D6
D6
0
0
BUSY
D5
D5
D5
D5
0
1
D4
D4
D4
D4
D
0
0
Write data
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D3
D3
D3
D3
0
0
E
PD
D2
D2
D2
D2
0
1
D1
D1
D1
D1
1
V
0
D0
D0
D0
D0
H
1
1
2005/10/05