ST7556 Sitronix Technology, ST7556 Datasheet - Page 36

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ST7556

Manufacturer Part Number
ST7556
Description
65 x 102 Dot Matrix LCD Controller/Driver
Manufacturer
Sitronix Technology
Datasheet
www.DataSheet4U.com
ST7556
*1 The input signal rise time and fall time (tr, tf) is specified at 15 ns or less. When the system cycle time is extremely fast,
*2 All timing is specified using 20% and 80% of VDD as the reference.
*3 tEWLW and tEWLR are specified as the overlap between CSB being “L” and E.
Ver 2.2
Address hold time
Address setup time
System cycle time
Enable L pulse width (WRITE)
Enable H pulse width (WRITE)
Enable L pulse width (READ)
Enable H pulse width (READ)
WRITE Data setup time
WRITE Address hold time
READ access time
READ Output disable time
(tr +tf) ≦ (tCYC6 – tEWLW – tEWHW) for (tr + tf) ≦ (tCYC6 – tEWLR – tEWHR) are specified.
Item
Address hold time
Address setup time
System cycle time
Enable L pulse width (WRITE)
Enable H pulse width (WRITE)
Enable L pulse width (READ)
Enable H pulse width (READ)
WRITE Data setup time
WRITE Address hold time
READ access time
READ Output disable time
Item
Signal
A0
WR
RD
D0 to D7
D0 to D7
Signal
WR
RD
A0
tAH6
tAW6
tCYC6
tEWLW
tEWHW
tEWLR
tEWHR
tDS6
tDH6
tACC6
tOH6
Symbol
tAH6
tAW6
tCYC6
tEWLW
tEWHW
tEWLR
tEWHR
tDS6
tDH6
tACC6
tOH6
Symbol
36/43
Condition
CL = 100 pF
CL = 100 pF
CL = 100 pF
CL = 100 pF
Condition
(VDD =1.8V , Ta =30~85°C )
Rating
Min.
30
0
640
360
280
360
280
80
30
10
(VDD = 2.7V , Ta =30~85°C )
Min.
400
220
180
220
180
15
40
10
0
0
Rating
Max.
240
200
Max.
140
100
2005/10/05
Units
Units
ns
ns

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