ST7556 Sitronix Technology, ST7556 Datasheet - Page 15

• Manufacturer Part Number: ST7556
• Description: 65 x 102 Dot Matrix LCD Controller/Driver
• Manufacturer: Sitronix Technology

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ST7556
6. FUNCTIONS DESCRIPTION
MICROPROCESSOR INTERFACE
Chip Select Input
There is CSB pin for chip selection. The ST7556 can interface with an MPU when CSB is "L". When CSB is “H”, these pins
are set to any other combination, A0, /RD(E), and /WR(R/W) inputs are disabled and D0 to D7 are to be high impedance.
And, in case of serial interface, the internal shift register and the counter are reset.
Parallel / Serial Interface
ST7556 has three types of interface with an MPU, which are one serial and two parallel interfaces. This parallel or serial
interface is determined by P/S pin as shown in table 1.
Parallel Interface (P/S = "H")
The 8-bit bi-directional data bus is used in parallel interface and the type of MPU is selected by IMS as shown in table 2.
The type of data transfer is determined by signals at A0, /RD (E) and /WR(R/W) as shown in t
NOTE: When /RD (E) pin is always pulled high for 6800-series interface, it can be used CSB for enable signal. In this case,
interface data is latched at the rising edge of CSB and the type of data transfer is determined by signals at A0, /WR(R/W)
as in case of 6800-series mode.
Serial Interface (P/S=" L ")
4-line SPI interface
IMS=” L “, P/S=” H “: 4-line SPI interface
When the ST7556 is active (CSB=”L”), serial data (D6) and serial clock (D7) inputs are enabled. And not active, the internal
8-bit shift register and the 3-bit counter are reset. The display data/command indication may be controlled either via
software or the Register Select (A0) Pin, based on the setting of P/S. When the A0 pin is used (IMS = “H”), data is display
data when A0 is high, and command data when A0 is low. When A0 is not used (IMS = “L”), the LCD Driver will receive
command from MCU by default. If messages on the data pin are data rather than command, MCU should send Data
direction command to control the data direction and then one more command to define the number of data bytes will be
write. After these two continuous commands are sending, the following messages will be data rather than command. Serial
data can be read on the rising edge of serial clock going into D7 and processed as 8-bit parallel data on the eighth serial
clock. And the DDRAM column address pointer will be increased by one automatically. The next bytes after the display
data string are handled as command data.
Ver 2.2
Common
RS
H
H
L
L
Serial Mode
(/RD)
H
H
H
H
E
6800-series
IMS
H
L
(/WR)
R/W
H
H
L
L
Parallel
CSB
CSB
CSB
P/S
Serial
Type
Table 2. Microprocessor Selection for Parallel Interface
L
/RD
(E)
A0
A0
A0
H
H
L
L
8080-series
IMS
Table 1. Parallel/Serial Interface Mode
H
P/S
H
L
Table 3. Parallel Data Transfer
/RD (E) /WR (R/W)
/RD
E
(R/W)
/WR
IMS
H
H
L
L
H
H
L
L
CSB
CSB
CSB
CSB
CSB
R/W
/WR
15/43
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6800-series MPU interface
8080-series MPU interface
4-pin SPI interface
Do not use
DB0 to DB7
DB0 to DB7 6800-series
DB0 to DB7 8080-series
Writes to internal register (instruction)
Interface mode
Used
Display data read out
A0
Register status read
Display data write
Description
MPU bus
ab
le 3.
Description
Write only
2005/10/05