STIR4200 SigmaTel, STIR4200 Datasheet
STIR4200
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STIR4200 Summary of contents
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... SigmaTel, Inc. does not assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential, or incidential damages. STIr4200 Version 2.0 April ‘03 ...
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... Baud Rate Register ............................................................................15 6.1.3. Control Register .................................................................................................16 6.1.4. Sensitivity Register .............................................................................................17 6.1.5. Status Register ...................................................................................................17 6.1.6. FIFO Count Registers (LSB,MSB) .....................................................................18 6.1.6.1. FIFO Count LSB .................................................................................18 6.1.6.2. FIFO Count MSB ................................................................................18 6.1.7. DPLL Tune Register ...........................................................................................18 6.1.8. IRDIG Setup Register .........................................................................................19 6.1.9. Test Register ......................................................................................................19 7. PIN DESCRIPTION .................................................................................................... 20 7.1. STIr4200S 28-Pin SSOP Pin Description .......................................................................20 8. PACKAGE DRAWINGS ............................................................................................ 21 2 3-4200-D1-2.0-0403 ...
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... Table 15. Control Register ............................................................................................................16 Table 16. Sensitivity Register .......................................................................................................17 Table 17. Status Register .............................................................................................................17 Table 18. FIFO Count LSB ...........................................................................................................18 Table 19. FIFO Count MSB ..........................................................................................................18 Table 20. DPLL Tune Register .....................................................................................................18 Table 21. IRDIG Setup Register ...................................................................................................19 Table 22. Test Register ................................................................................................................19 Table 23. Pin Descriptions for STIr4200S 28-Pin SSOP Package ...............................................20 3-4200-D1-2.0-0403 STIr4200 USB/IrDA Bridge Controller 3 ...
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... The SigmaTel STIr4200 is a low cost, low power, USB/IrDA Bridge Controller inte- grated circuit for enabling IrDA wireless data communications through a standard PC USB port. The STIr4200 directly interfaces to both single path and dual path receive IrDA transceiver module architectures and contains a USB controller, IrDA controller, interface logic, and memory buffer for full IrDA 1 ...
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... DD T Operating Temperature Range A Table 2. Recommended Operating Conditions 3-4200-D1-2.0-0403 Optional LED Driver TX DIODE USB - IRDA Bridge IC IrDA Controller 4K FIFO Buffer IR Register Set 12 Mhz Figure 1. STIr4200 Block Diagram MIN MAX 0 70 260 -55 125 -0 0.4V DD +/- 2KV Table 1. Absolute Maximum Ratings MIN TYP 3 ...
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... FUNCTIONAL DESCRIPTION 4.1. Overview The STIr4200 consists of two major functional blocks, the USB controller and the digital IR transceiver. The USB controller provides a Control, Bulk-In, and Bulk- Out endpoints to the USB host. The digital IR transceiver consists of a transmit and receive interface that connects to an analog IR front end. Figure 1shows a block dia- gram of the device ...
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... USB driver to access registers in the Digital IR Transceiver and ROM in the USB controller. Note: The STIr4200 device conforms to all of the USB 1.1 specifications with one exception of the "get_interface" command. This command is used only during USB conformance testing, and during that testing, improper operation will be noted on test results ...
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... STIr4200 USB/IrDA Bridge Controller Read Multiple Registers 4.3.3. The read multiple registers vendor specific command allows the user to read multi- ple sequential registers from the Digital IR Transceiver. Each register is one byte wide, so the command indicates the first register to read, the number of registers to read, and the responding data phase supplies the data from those registers ...
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... IrDA FIR,MIR,SIR) FIFO RX Demodulator (ASK, IrDA FIR,MIR,SIR) Register Array Figure 3. Block Diagram of Digital IR Transceiver C I FCS EOF Beginning of frame(s) Address field Control field Information field Frame check sequence (CRC) End of frame Table 9. IrLAP Frame STIr4200 Analog TX TX DIODE Section TX DATA RX FAST RX SLOW 9 ...
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... STIr4200 USB/IrDA Bridge Controller 5. IR FRAMING FORMATS 5.1. Transmit Frame Format 5.1.1. SIR Transmit Frame The SIR rates include 2.4, 9.6, 19.2, 38.4, 57.6, and 115.2 Kbps. For SIR, the frame presented to the USB bulk transmit interface must be organized in the following fashion as shown in Figure 4. Number of following bytes 10 0x55 ...
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... USB/IrDA Bridge Controller 0x55 Header ID 0xAA LSB size MSB size 0x7F 0x7F 0x7F 0x7F PREAMBLE : These characters 0x7F cause the STIr4200S to generate the 0x7F preamble sequence used by the receiving device for synchronization. 0x7F There must be exactly 16 characters. 0x7F 0x7F 0x7F 0x7F 0x7F 0x7F ...
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... Data received into the STIr4200 FIFO from the digital infrared interface can be accessed by performing a bulk read on the USB interface. The received data con- tains the encoded infrared data. The STIr4200 does not perform any frame valida- tion or CRC-Checking. Multiple frames may exist within one bulk read depending upon the size of the bulk read ...
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... The FIR encoding scheme is modified slightly from the standard scheme. The char- acter 0x7E is used to delineate the BOF and EOF. The STIr4200 escapes three characters in the data field on receive, 0x7F, 0x7E and 0x7D, which allows the 0x7E characters used as BOF and EOF to be unique. The 0x7E character can then be used to delineate the infrared frame boundaries ...
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... Test Register R/W PLLDWN R/W : Read/Write RO : Read only ROC : Read only, clear on read WO : Write only Note: 1. Due to double buffering, FFCNT could be off by as much as 3 bytes 6.1. Detailed STIr4200 Register Descriptions 6.1.1. FIFO Data Register Offset FIFO Data Default State 0 0 Bit Number Bit Mnemonic Access 7 – ...
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... Sets the divide ratio of the PLL for the infrared modulator/demodulator. Table 13. Baud Rate Register Speed Mode Register 4.0 Mbps 0x80 0x20 57.6 Kbps 0x20 38.4 Kbps 0x20 19.2 Kbps 0x20 9.6 Kbps 0x20 2.4 Kbps 0x21 STIr4200 USB/IrDA Bridge Controller Baud Rate Register 0x02 0x09 ...
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... Function Use this bit only when the STIr4200 is connected to a TEMIC style infrared transceiver. This bit is used to put the infrared transceiver into the power down state or toggle the transceiver between high and low speed. POWER DOWN STATE: Set the SD/MODE bit to enter the power down state. ...
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... SIR transmit pulse width. When cleared, the pulse width for SIR mode transmission is 1.6usec. When set, the pulse width is 3/16 Revision ID of the chip. Table 16. Sensitivity Register FFDIR FFCLR 1 0 Function Table 17. Status Register STIr4200 USB/IrDA Bridge Controller ID(2: 0) ID(2) ID(1) ID(0) SIR ...
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... STIr4200 USB/IrDA Bridge Controller 6.1.6. FIFO Count Registers (LSB,MSB) Offset 6&7 6.1.6.1. Offset 6 7 FIFO Count Register (LSB) Default State 0 Bit Number Bit Mnemonic Access 7-0 FFCNT(7:0) RO 6.1.6.2. Offset 7 7 FIFO Count Register (MSB) Default State 0 Bit Number Bit Mnemonic Access 7-5 Reserved RO 4-0 FFCNT(12:8) RO 6.1.7. DPLL Tune Register ...
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... FIFO to buffer data. This bit should be used for chip debug purposes only. R/W Enables the oscillator to be powered down while in USB Suspend Mode. R/W Sets the bias currents for the crystal oscillator circuitry. These bits should be used for chip debug purposes only. Table 22. Test Register STIr4200 USB/IrDA Bridge Controller Reserved 0 Function 2 ...
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... POS TST-CLK 21 TSTD 22 TST_EN 23 RESETZ 24 GNDD 25 XTALI 26 XTALO Table 23. Pin Descriptions for STIr4200S 28-Pin SSOP Package DIODE N TALO N TALI FAST DATA ESET Z RX ...
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... PACKAGE DRAWINGS Figure 9. 28-Pin SSOP Package Drawing 3-4200-D1-2.0-0403 STIr4200 USB/IrDA Bridge Controller 21 ...