STIR4200 SigmaTel, STIR4200 Datasheet - Page 14

• Manufacturer Part Number: STIR4200
• Description: USB / IrDA Bridge Controller
• Manufacturer: SigmaTel

STIr4200
USB/IrDA Bridge Controller
6. DIGITAL IR TRANSCEIVER REGISTERS
14
R/W : Read/Write
RO : Read only
ROC : Read only, clear on read
WO : Write only
Note:
FIFO Data
Default State
Offset
Bit Number
10
12
13
14
15
11
0
1
2
3
4
5
6
7
8
9
6.1.
7 – 0
IRDIG Setup Register
FIFO Count (Note 1)
FIFO Count (Note 1)
DPLL Tune Register
Baud Rate Register
Sensitivity Register
1.
Control Register
Register (MSB)
Status Register
Mode Register
Register (LSB)
Test Register
Description
FIFO Data
Reserved
Reserved
Reserved
Reserved
Reserved
6.1.1.
Due to double buffering, FFCNT could be off by as much as 3 bytes
Detailed STIr4200 Register Descriptions
Bit Mnemonic
Reserved
7
0
FIFO Data Register
Offset 0
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
RO
RO
RO
6
0
EOFRAME
SDMODE RXSLOW DLOOP1
PLLDWN
RXHIGH
Access
R/W
FIR
RO
Table 10. Ir Transceiver Registers
7
0
Table 11. FIFO Data Register
RXDSNS(2: 0)
FFUNDER
Reserved
5
0
LOOPIR LOOPUSB TSTENA
TXLOW
ROC
The FIFO data register is used internally by the USB interface to
access the FIFO data in the digital infrared block. Although this
register is accessible through the USB interface, it should never be
accessed during normal operation.
6
0
Reserved Reserved Reserved Reserved Reserved Reserved
FFOVER
ROC
4
0
SIR
DPCNT(5: 0)
5
0
Reserved
BSTUFF
TXPWD
FFDIR
ASK
R/W
RO
PDCLK(7: 0)
Bit Position
4
FFCNT(7:0)
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
3
0
FASTRXEN FFRSTEN FFSPRST PDCLK(8)
SPWIDTH
RXPWD
FFCLR
Function
R/W
WO
3
2
0
FFCNT(12: 8)
FFEMPTY
ID(2)
TSTOSC(3: 0)
RO
RO
TXPWR(1: 0)
2
1
0
3-4200-D1-2.0-0403
FFRXERR
ID(1)
ROC
RO
LONGP(1: 0)
1
FFTXERR
SRESET
0
0
ID(0)
ROC
RO
0