STA027 ST Microelectronics, STA027 Datasheet - Page 17

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STA027

Manufacturer Part Number
STA027
Description
SBC Codec
Manufacturer
ST Microelectronics
Datasheet

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STA027
5.2.6
5.2.7
5.2.8
PLL_AUDIO_PEL_176 :
Address : 0xE1 (225)
Type : RW - DEC
Software Reset : 54
Description :
This register must contain a PEL value that enables the audio PLL to generate a frequency of
ofact*176 kHz for the PCMCK.See table 1, 2 & 3.
Default value at soft reset assume :
PLL_AUDIO_PEH_176 :
Address : 0xE2 (226)
Type : RW - DEC
Software Reset : 118
Description :
This register must contain a PEH value that enables the audio PLL to generate a frequency of
ofact*176 kHz for the PCMCK.See table 1, 2 & 3.
Default value at soft reset assume :
PLL_AUDIO_NDIV_176 :
Address : 0xE3 (227)
Type : RW - DEC
Software Reset : 0
Description :
This register must contain a NDIV value that enables the audio PLL to generate a frequency of
ofact*176 kHz for the PCMCK.See table 1, 2 & 3.
b7
b7
b7
fact == 256
external crystal provide a CRYCK running at 14.31818 MHz
ofact == 256
external crystal provide a CRYCK running at 14.31818 MHz
b6
b6
b6
b5
b5
b5
CD00066274
b4
b4
b4
b3
b3
b3
b2
b2
b2
5 Register description
b1
b1
b1
b0
b0
b0
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