HT68F04 Holtek Semiconductor, HT68F04 Datasheet - Page 116

• Manufacturer Part Number: HT68F04
• Description: Small Package Enhanced Flash Type 8-Bit MCU
• Manufacturer: Holtek Semiconductor

External Interrupt
The external interrupt is controlled by signal transitions
on the INT pin. An external interrupt request will take
place when the external interrupt request flag, INTF, is
set, which will occur when a transition, whose type is
chosen by the edge select bits, appears on the external
interrupt pin. To allow the program to branch to its re-
spective interrupt vector address, the global interrupt
enable bit, EMI, and respective external interrupt enable
bit, INTE, must first be set. Additionally the correct inter-
rupt edge type must be selected using the INTEG regis-
ter to enable the external interrupt function and to
choose the trigger edge type. As the external interrupt
pin is pin-shared with I/O pin, it can only be configured
as external interrupt pin if the external interrupt enable
bit in the corresponding interrupt register has been set.
The pin must also be setup as an input by setting the
corresponding bit in the port control register. When the
interrupt is enabled, the stack is not full and the correct
transition type appears on the external interrupt pin, a
subroutine call to the external interrupt vector, will take
place. When the interrupt is serviced, the external inter-
rupt request flag, INTF, will be automatically reset and
the EMI bit will be automatically cleared to disable other
interrupts. Note that any pull-high resistor selections on
the external interrupt pin will remain valid even if the pin
is used as an external interrupt input.
The INTEG register is used to select the type of active
edge that will trigger the external interrupt. A choice of
either rising or falling or both edge types can be chosen
to trigger an external interrupt. Note that the INTEG reg-
ister can also be used to disable the external interrupt
function.
Comparator Interrupt
The comparator interrupt is controlled by the internal
comparator. A comparator interrupt request will take
place when the comparator interrupt request flag, CPF,
is set, a situation that will occur when the comparator
output changes state. To allow the program to branch to
its respective interrupt vector address, the global inter-
rupt enable bit, EMI, and comparator interrupt enable
bit, CPE, must first be set. When the interrupt is en-
abled, the stack is not full and the comparator inputs
generate a comparator output transition, a subroutine
call to the comparator interrupt vector, will take place.
When the interrupt is serviced, the comparator interrupt
request flag, will be automatically reset and the EMI bit
will be automatically cleared to disable other interrupts.
Multi-function Interrupt
Within these devices there are up to three Multi-function
interrupts. Unlike the other independent interrupts,
these interrupts have no independent source, but rather
are formed from other existing interrupt sources, namely
the TM Interrupts, SIM Interrupt, External Peripheral In-
terrupt, LVD interrupt and EEPROM Interrupt.
Rev. 1.00
116
HT66F03/HT66F04/HT68F03/HT68F04
A Multi-function interrupt request will take place when
any of the Multi-function interrupt request flags, MFnF
are set. The Multi-function interrupt flags will be set
when any of their included functions generate an inter-
rupt request flag. To allow the program to branch to its
respective interrupt vector address, when the
Multi-function interrupt is enabled and the stack is not
full, and either one of the interrupts contained within
each of Multi-function interrupt occurs, a subroutine call
to one of the Multi-function interrupt vectors will take
place. When the interrupt is serviced, the related
Multi-Function request flag, will be automatically reset
and the EMI bit will be automatically cleared to disable
other interrupts.
However, it must be noted that, although the
Multi-function Interrupt flags will be automatically reset
when the interrupt is serviced, the request flags from the
original source of the Multi-function interrupts, namely
the TM Interrupts, LVD interrupt and EEPROM Interrupt
will not be automatically reset and must be manually re-
set by the application program.
A/D Converter Interrupt
Some devices contain an A/D converter which has its
own independent interrupt. The A/D Converter Interrupt
is controlled by the termination of an A/D conversion
process. An A/D Converter Interrupt request will take
place when the A/D Converter Interrupt request flag,
ADF, is set, which occurs when the A/D conversion pro-
cess finishes. To allow the program to branch to its re-
spective interrupt vector address, the global interrupt
enable bit, EMI, and A/D Interrupt enable bit, ADE, must
first be set. When the interrupt is enabled, the stack is
not full and the A/D conversion process has ended, a
subroutine call to the A/D Converter Interrupt vector, will
take place. When the interrupt is serviced, the A/D Con-
verter Interrupt flag, ADF, will be automatically cleared.
The EMI bit will also be automatically cleared to disable
other interrupts.
Time Base Interrupts
The function of the Time Base Interrupts is to provide reg-
ular time signal in the form of an internal interrupt. They
are controlled by the overflow signals from their respec-
tive timer functions. When these happens their respec-
tive interrupt request flags, TB0F or TB1F will be set. To
allow the program to branch to their respective interrupt
vector addresses, the global interrupt enable bit, EMI and
Time Base enable bits, TB0E or TB1E, must first be set.
When the interrupt is enabled, the stack is not full and the
Time Base overflows, a subroutine call to their respective
vector locations will take place. When the interrupt is ser-
viced, the respective interrupt request flag, TB0F or
TB1F, will be automatically reset and the EMI bit will be
cleared to disable other interrupts.
April 16, 2010
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