HT68F04 Holtek Semiconductor, HT68F04 Datasheet - Page 81

• Manufacturer Part Number: HT68F04
• Description: Small Package Enhanced Flash Type 8-Bit MCU
• Manufacturer: Holtek Semiconductor

Enhanced Type TM Operating Modes
The Enhanced Type TM can operate in one of five operating modes, Compare Match Output Mode, PWM Output
Mode, Single Pulse Output Mode, Capture Input Mode or Timer/Counter Mode. The operating mode is selected using
the TnAM1 and TnAM0 bits in the TMnC1, and the TnBM1 and TnBM0 bits in the TMnC2 register.
Note: ²Ö² allowed to be used. ²¾²: not allowed to be used
Compare Output Mode
To select this mode, bits TnAM1, TnAM0 and TnBM1,
TnBM0 in the TMnC1/TMnC2 registers should be all
cleared to zero. In this mode once the counter is en-
abled and running it can be cleared by three methods.
These are a counter overflow, a compare match from
Comparator A and a compare match from Comparator
P. When the TnCCLR bit is low, there are two ways in
which the counter can be cleared. One is when a com-
pare match occurs from Comparator P, the other is when
the CCRP bits are all zero which allows the counter to
overflow. Here both the TnAF and TnPF interrupt re-
quest flags for Comparator A and Comparator P respec-
tively, will both be generated.
Rev. 1.00
CCRB Compare Match Output Mode
CCRB Timer/Counter Mode
CCRB PWM Output Mode
CCRB Single Pulse Output Mode
CCRB Input Capture Mode
¨
Bit 7 ~ 0
¨
Bit 7~2
Bit 1~0
TM2BL Register
TM2BH Register
Name
Name
POR
POR
R/W
R/W
Bit
Bit
ETM Operating Mode
TM2BL: TM2 CCRB Low Byte Register bit 7~bit 0
TM2 10-bit CCRB bit 7~bit 0
Unimplemented, read as ²0²
TM2BH: TM2 CCRB High Byte Register bit 1~bit 0
TM2 10-bit CCRB bit 9 ~ bit 8
R/W
D7
¾
¾
¾
7
0
7
R/W
D6
¾
¾
¾
6
0
6
Compare Match
Output Mode
CCRA
¾
Ö
Ö
Ö
Ö
R/W
D5
¾
¾
¾
5
0
5
Timer/Counter
CCRA
Mode
HT66F03/HT66F04/HT68F03/HT68F04
81
R/W
D4
¾
¾
¾
¾
Ö
Ö
Ö
Ö
4
0
4
If the TnCCLR bit in the TMnC1 register is high then the
counter will be cleared when a compare match occurs
from Comparator A. However, here only the TnAF inter-
rupt request flag will be generated even if the value of
the CCRP bits is less than that of the CCRA registers.
Therefore when TnCCLR is high no TnPF interrupt re-
quest flag will be generated.
Output Mode
R/W
CCRA PWM
D3
¾
¾
¾
3
0
3
¾
Ö
Ö
Ö
Ö
R/W
D2
¾
¾
¾
2
0
2
CCRA Single
Pulse Output
Mode
¾
¾
¾
¾
Ö
R/W
R/W
D1
D9
1
0
1
0
Capture Mode
CCRA Input
April 16, 2010
www.DataSheet4U.com
¾
¾
¾
¾
Ö
R/W
R/W
D0
D8
0
0
0
0