DS2196 Dallas Semiconducotr, DS2196 Datasheet - Page 66
DS2196
Manufacturer Part Number
DS2196
Description
T1 Dual Framer LIU
Manufacturer
Dallas Semiconducotr
Datasheet
1.DS2196.pdf
(157 pages)
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Table 8-1: LINE CODE VIOLATION COUNTING ARRANGEMENTS
Path Code Violation Count Register (PCVCR) When the receive side of a framer is set to operate in the
ESF framing mode (CCR2.3=1), PCVCR will automatically be set as a 12–bit counter that will record
errors in the CRC6 code words. When set to operate in the D4 framing mode (CCR2.3=0), PCVCR will
automatically count errors in the Ft framing bit position.
programmed to also report errors in the Fs framing bit position. The PCVCR will be disabled during
receive loss of synchronization (RLOS=1) conditions. See Table 8-2 for a detailed description of exactly
what errors the PCVCR counts.
PCVCR1A: PATH VIOLATION COUNT REGISTER 1 FRAMER A (Address = 25 Hex)
PCVCR2A: PATH VIOLATION COUNT REGISTER 2 FRAMER A (Address = 26 Hex)
PCVCR1B: PATH VIOLATION COUNT REGISTER 1 FRAMER B (Address = C5 Hex)
PCVCR2B: PATH VIOLATION COUNT REGISTER 2 FRAMER B (Address = C6 Hex)
NOTES:
1. The upper nibble of the counter at address 25 is used by the Multiframes Out of Sync Count Register
2. PCVCR counts either errors in CRC code words (in the ESF framing mode; CCR2.3=1) or errors in
(note 1)
COUNT EXCESSIVE
(MSB)
CRC/
FB7
CRC/FB11
SYMBOL
the framing bit position (in the D4 framing mode; CCR2.3=0).
CRC/FB0
(RCR1.7)
ZEROS
yes
yes
no
no
(note 1)
CRC/
FB6
POSITION
PCVCR1.3
PCVCR2.0
(note 1)
CRC/
FB5
B8ZS ENABLED
(note 1)
CRC/
FB4
(CCR2.2)
NAME AND DESCRIPTION
MSB of the 12–Bit CRC6 Error or Frame Bit Error Count
(note #2)
LSB of the 12–Bit CRC6 Error or Frame Bit Error Count
(note #2)
yes
yes
no
no
CRC/
FB11
CRC/
FB3
66 of 157
BPVs
BPVs + 16 consecutive
zeros
BPVs (B8ZS code words
not counted)
BPV’s + 8 consecutive
zeros
CRC/
CRC/
FB10
FB2
WHAT IS COUNTED
Via the RCR2.1 bit, a framer can be
IN THE LCVCRs
CRC/
CRC/
FB9
FB1
(LSB)
CRC/
CRC/
FB8
FB0
PCVCR1
PCVCR2
DS2196