AN1525 STMicroelectronics, AN1525 Datasheet - Page 11

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AN1525

Manufacturer Part Number
AN1525
Description
I2C COMMUNICATION BETWEEN ST52X520 AND EEPROM
Manufacturer
STMicroelectronics
Datasheet
AN1525 - APPLICATION NOTE
5 TEST
The graphics represented in Figure 15 are those obtained by the logical states analyzer and they regard
the writing and reading phase, obtained by slightly modifying the program in order to introduce the refer-
ence signals indicated (PC0->PC4), to view the synchronization of the data of port B with the various phas-
es.
Figure 15. WRITE AND READ BLOCKS
In this test, the initial memory location address where reading and writing will begin is 16. The number of
bytes written in the memory is 8 and the initial value written is 5. This value will be incremented every time
writing in the memory occurs. This data is specified in the USER_VAR block (see Figure 6).
The PC0 signal changes state everytime the START condition is sent. On the other hand, the PC1 signal
changes state every time the CB_W control is executed, which sends the Device Select Code to the mem-
ory. The PC2 signal changes its state of performance of the W_SLAD control, which sends to the memory
(EEPROM) the address of the location where reading or writing will be performed. The PC3 signal chang-
es state before sending or receiving every byte of data from the memory. Lastly, the PC4 signal changes
state everytime the STOP condition is sent.
REFERENCES
[1] ST52x520 - Datasheet, STMicroelectronics, 2001
[2] ST24C0Z1 - Datasheet, STMicroelectronics, 1999
[3] Visual FIVE 5.0 - User Manual, STMicroelectronics, 2002
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