CY24239 Cypress Semiconductor, CY24239 Datasheet - Page 12

• Manufacturer Part Number: CY24239
• Description: Spread Spectrum Frequency Timing Generator
• Manufacturer: Cypress Semiconductor

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SDRAM 0:16 Clock Outputs (Lump Capacitance Test Load = 22 pF)
48-MHz Clock Output (Lump Capacitance Test Load = 20 pF)
Document #: 38-07038 Rev. **
t
t
t
t
t
t
t
t
Z
Parameter
f
f
m/n
t
t
t
f
Z
Parameter
P
H
L
R
F
D
SK
PD
D
R
F
D
ST
o
o
Period
High Time
Low Time
Output Rise Edge
Rate
Output Fall Edge
Rate
Duty Cycle
Output Skew
Propagation
Delay
AC Output
Impedance
Frequency, Actual
Deviation from 48 MHz
PLL Ratio
Output Rise Edge Rate
Output Fall Edge Rate
Duty Cycle
Frequency Stabilization
from Power-up (cold start)
AC Output Impedance
Description
Description
Measured on rising edge at 1.5V
Duration of clock cycle above 2.4V
Duration of clock cycle below 0.4V
Measured from 0.4V to 2.4V
Measured from 2.4V to 0.4V
Measured on rising and falling edge at
1.5V
Measured on rising and falling edge at
1.5V
Measured from SDRAMIN
Average value during switching transi-
tion. Used for determining series termi-
nation value.
Determined by PLL divider ratio (see m/n below)
(48.008 – 48)/48
(14.31818 MHz x 57/17 = 48.008 MHz)
Measured from 0.4V to 2.4V
Measured from 2.4V to 0.4V
Measured on rising and falling edge at 1.5V
Assumes full supply voltage reached within 1 ms
from power-up. Short cycles exist prior to fre-
quency stabilization.
Average value during switching transition. Used
for determining series termination value.
Test Condition/
Comments
Test Condition/Comments
Min.
3.0
2.0
10
45
1
1
SDRAMIN =
100 MHz
Typ.
3.7
15
Min.
0.5
0.5
45
48.008
57/17
+167
Typ.
25
Max.
10.5
250
55
4
4
CY24239
Max.
Page 12 of 15
55
2
2
3
Unit
V/ns
V/ns
MHz
V/ns
V/ns
Unit
ppm
ns
ns
ns
ps
%
ns
ms
%