AN2184 Freescale Semiconductor / Motorola, AN2184 Datasheet - Page 11

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AN2184

Manufacturer Part Number
AN2184
Description
MCF5272 Interrupt Service Routine for the Physical Layer Interface Controller
Manufacturer
Freescale Semiconductor / Motorola
Datasheet
5.2 One-Port Processing
For this PLIC interrupt service routine, the channel priorities are fixed. In the periodic status registers, the
B1RDF, B1TDE, and DRDF have top priority, then the B2RDF, B2TDE, and DTDE follow. The xTUE and
xROE should be given lowest priority because they should be cleared. This interrupt service routine
implementation gives some flexibility by dynamically jumping between the action to take and the
verification of the bit that creates the interrupt. Furthermore, the purpose of the code was to first evaluate
the product after first silicon. The code and the ISR have been written with this objective in mind. In
conclusion, all the actions are taken inside the ISR instead of raising a flag in order to perform it once the
ISR has completed. The flow chart is shown in Figure 9.
Port0 Read
(GMT) = 0
PnGMT
Interrupt creation
Return from Interrupt
Action taken
(R) = 0
(GMT) = 1
PASR
PASR
Freescale Semiconductor, Inc.
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MCF5272 Interrupt Service Routine
Go to: www.freescale.com
Periodic Interrupt Process One-Port Processing
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