AN2184 Freescale Semiconductor / Motorola, AN2184 Datasheet - Page 16

• Manufacturer Part Number: AN2184
• Description: MCF5272 Interrupt Service Routine for the Physical Layer Interface Controller
• Manufacturer: Freescale Semiconductor / Motorola

6.3 Brief Register Explanation
This section describes the registers involved in the aperiodic interrupts service routine. The GCI oriented
registers are PnGMR, PnGMT, PnGCIR, and PnGCIT. These are the only register that affect the PASR
register. For more information about the definition of all those registers, please refer to the PLIC section in
the MCF5272 User’s Manual for a more detailed description.
6.4 Monitor Channel Sequence
This section details the manner in which GCI monitor channel data is handled. Based on the low-level
protocol specification, the following information will help the user better understand the GCI monitor
channel operation.
Aperiodic Interrupt Process Brief Register Explanation
16
Figure 12. Multi-Processing Aperiodic Interrupt Service Routine Flow Diagram
No
No
No
No
Process End
Interrupsts
(IE) = 1
(IE) = 1
(IE) = 1
(IE) = 1
P0ICR
P1ICR
P2ICR
P3ICR
ON
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MCF5272 Interrupt Service Routine
Yes
No
Yes
Yes
Yes
No
Go to: www.freescale.com
No
No
PASR[15:12
PASR[11:8]
PASR[3:0]
PASR[7:4]
] != 0
!= 0
!= 0
!= 0
Yes
Yes
Yes
Yes
Process Port0
Process Port1
Process Port2
Process Port3