EM639165 Etron Technology Inc., EM639165 Datasheet - Page 3

• Manufacturer Part Number: EM639165
• Description: 8Mega x 16bits SDRAM
• Manufacturer: Etron Technology Inc.

PIN FUNCTION
Preliminary
/RAS, /CAS, /WE
VDDQ,VSSQ
VDD,VSS
DQMU/L
DQ0-15
BA0,1
A0-11
CKE
CLK
/CS
Power Supply
Power Supply
Input / Output
Input
Input
Input
Input
Input
Input
Input
VDDQ and VSSQ are supplied to the Output Buffers only.
Power Supply for the memory array and peripheral circuitry.
Master Clock:
Clock Enable:
CKE controls internal clock.When CKE is low, internal clock for
the following cycle is ceased. CKE is also used to select
auto / self-refresh.
After self-refresh mode is started, CKE becomes asynchronous input.
Self-refresh is maintained as long as CKE is low.
A0-11 specify the Row / Column Address in conjunction with BA0,1.
The Row Address is specified by A0-11.
The Column Address is specified byA0-8.
A10 is also used to indicate precharge option. When A10 is high at a
read / write command, an auto precharge is performed. When A10 is
high at a precharge command, all banks are precharged.
Bank Address:
BA0,1 specifies one of four banks to which a command is applied.
BA0,1 must be set with ACT, PRE , READ , WRITE commands.
Data In and Data out are referenced to the rising edge of CLK.
Din Mask / Output Disable:
When DQM(U/L) is high in burst write, Din for the current cycle is
masked. When DQM(U/L) is high in burst read,
Dout is disabled at the next but one cycle.
All other inputs are referenced to the rising edge of CLK
When /CS is high, any command means No Operation.
Combination of /RAS, /CAS, /WE defines basic commands.
Chip Select:
3
Rev 1.0
EM639165
Feb. 2001