EM658160 Etron Technology Inc., EM658160 Datasheet - Page 11

• Manufacturer Part Number: EM658160
• Description: 4M x 16 DDR Synchronous DRAM (SDRAM)
• Manufacturer: Etron Technology Inc.

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Note:
1. Stress greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the
2. All voltages are referenced to V
3. These parameters depend on the cycle rate and these values are measured by the cycle rate under the
4. Power-up sequence is described in Note 6.
5. A.C. Test Conditions
SSTL_2 Interface
6.
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device.
minimum value of t
1) Power must be applied to V
2) After power-up, No-Operation of 200 µ−seconds minimum is required.
3) Start clock and keep CKE “HIGH” to maintain either No-Operation or Device Deselect at the input.
4) Issue EMRS – enable DLL.
5) Issue MRS – reset DLL and set device to idle with bit A8 (An additional 200 cycles min of clock are
6) Precharge all banks of the device.
7) Two or more Auto Refresh commands.
8) Issue MRS – Initialize device operation.
Power up Sequence
Power up must be performed in the following sequence.
Reference Level of Output Signals (V
maintain CKE “LOW”. Power applied to V
needed for DLL lock)
Reference Level of Input Signals
Input Signals Slew Rate
Input Signal Levels
Output Load
CK
and t
RC
. Input signals are changed one time during t
SS
DD
.
and V
Output
RFE
DDQ
)
SSTL_2 A.C. Test Load
4Mx16 DDR SDRAM
(simultaneously) when all input signals are held "NOP" state and
DDQ
11
the same time as V
Reference to the Under Output Load (A)
25 Ω
V
REF
0.5*V
+0.35 V / V
0.5 * V
0.5 * V
TT
1 V/ns
DDQ
30pF
and V
25 Ω
CK
DDQ
DDQ
.
Rev. 1.1
REF
REF.
-0.35 V
EM658160
Jan. 2002