SSD1859 Solomon Systech, SSD1859 Datasheet - Page 26

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SSD1859

Manufacturer Part Number
SSD1859
Description
128 x 80 STN LCD Segment / Common 4 G/S Drive
Manufacturer
Solomon Systech
Datasheet
Read Status Byte
A 8 bits status byte will be placed onto the data bus when a read operation is performed if
The status byte is defined as following:
D7
BUSY
Data Read / Write
To read data from the GDDRAM, input High to
Low to
mode. In normal mode, GDDRAM column address pointer will be increased by one automatically after
each data read. Also, a dummy read is required before the first data is read. See Figure 3 in Functional
Description.
To write data to the GDDRAM, input Low to
mode. For serial interface, it will always be in write mode. GDDRAM column address pointer will be
increased by one automatically after each data write. After the data read/write operation (address=127)
is executed, the address will be reset to 0 in next data read/write operation.
Address Increment Table (Automatic)
Address Increment is done automatically after data read/write. The column address pointer of GDDRAM
is affected. After the data read/write operation (address=127) is executed, the address will be reset to 0
in next data read/write operation.
Commands Required for R/
R/ W ( WR ) Actions on RAMs
Read/Write Data from/to
GDDRAM.
* No need to resend the command again if it is set previously.
The read / write action to the Display Data RAM does not depend on the display mode. This means the
user can change the RAM content whether the target RAM content is being displayed or not.
Solomon Systech
D/ C
0
0
1
1
E( RD )
D6
ON
pin and High to
R/ W ( WR )
D5
RES
0
1
0
1
D4
0
D/ C
W
Write Command
D3
1
pin for 8080-series parallel mode. No data read is provided for serial
Read Status
(
Commands Required
Set GDDRAM Page Address
Set GDDRAM Column Address
Read/Write Data
Write Data
Read Data
WR
Action
) Actions on RAM
D2
0
R/ W ( WR )
R/ W ( WR )
D1
0
pin and High to
pin and
Auto Address Increment
D0
1
Dec 2003
Yes
Yes
No
No
D/ C
Comment
BUSY=0 : Chip is idle
BUSY=1 : Chip is executing
instruction
ON=0 : Display is OFF
ON=1 : Display is ON
RES
RES
D/ C
pin for 6800-series parallel mode,
(1011X
(0001X
(0000X
(X
P 26/48 Rev 1.0
7
=0: Chip is idle
=1: Chip is executing reset
X
pin for 6800-series parallel
6
X
5
3
3
3
X
X
X
X
4
2
2
2
X
X
X
X
3
1
1
1
X
X
X
X
2
0
0
0
X
)*
)*
)*
1
X
0
D/ C
)
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is low.
SSD1859

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