LM3S1332 Luminary Micro, Inc, LM3S1332 Datasheet - Page 13
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LM3S1332
Manufacturer Part Number
LM3S1332
Description
Lm3s1332 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet
1.LM3S1332.pdf
(447 pages)
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General-Purpose Input/Outputs (GPIOs) ................................................................................... 159
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July 26, 2008
Flash Memory Control (FMC), offset 0x008 ..................................................................... 142
Flash Controller Raw Interrupt Status (FCRIS), offset 0x00C ............................................ 144
Flash Controller Interrupt Mask (FCIM), offset 0x010 ........................................................ 145
Flash Controller Masked Interrupt Status and Clear (FCMISC), offset 0x014 ..................... 146
USec Reload (USECRL), offset 0x140 ............................................................................ 147
Flash Memory Protection Read Enable 0 (FMPRE0), offset 0x130 and 0x200 ................... 148
Flash Memory Protection Program Enable 0 (FMPPE0), offset 0x134 and 0x400 ............... 149
User Debug (USER_DBG), offset 0x1D0 ......................................................................... 150
User Register 0 (USER_REG0), offset 0x1E0 .................................................................. 151
User Register 1 (USER_REG1), offset 0x1E4 .................................................................. 152
Flash Memory Protection Read Enable 1 (FMPRE1), offset 0x204 .................................... 153
Flash Memory Protection Read Enable 2 (FMPRE2), offset 0x208 .................................... 154
Flash Memory Protection Read Enable 3 (FMPRE3), offset 0x20C ................................... 155
Flash Memory Protection Program Enable 1 (FMPPE1), offset 0x404 ............................... 156
Flash Memory Protection Program Enable 2 (FMPPE2), offset 0x408 ............................... 157
Flash Memory Protection Program Enable 3 (FMPPE3), offset 0x40C ............................... 158
GPIO Data (GPIODATA), offset 0x000 ............................................................................ 167
GPIO Direction (GPIODIR), offset 0x400 ......................................................................... 168
GPIO Interrupt Sense (GPIOIS), offset 0x404 .................................................................. 169
GPIO Interrupt Both Edges (GPIOIBE), offset 0x408 ........................................................ 170
GPIO Interrupt Event (GPIOIEV), offset 0x40C ................................................................ 171
GPIO Interrupt Mask (GPIOIM), offset 0x410 ................................................................... 172
GPIO Raw Interrupt Status (GPIORIS), offset 0x414 ........................................................ 173
GPIO Masked Interrupt Status (GPIOMIS), offset 0x418 ................................................... 174
GPIO Interrupt Clear (GPIOICR), offset 0x41C ................................................................ 175
GPIO Alternate Function Select (GPIOAFSEL), offset 0x420 ............................................ 176
GPIO 2-mA Drive Select (GPIODR2R), offset 0x500 ........................................................ 178
GPIO 4-mA Drive Select (GPIODR4R), offset 0x504 ........................................................ 179
GPIO 8-mA Drive Select (GPIODR8R), offset 0x508 ........................................................ 180
GPIO Open Drain Select (GPIOODR), offset 0x50C ......................................................... 181
GPIO Pull-Up Select (GPIOPUR), offset 0x510 ................................................................ 182
GPIO Pull-Down Select (GPIOPDR), offset 0x514 ........................................................... 183
GPIO Slew Rate Control Select (GPIOSLR), offset 0x518 ................................................ 184
GPIO Digital Enable (GPIODEN), offset 0x51C ................................................................ 185
GPIO Lock (GPIOLOCK), offset 0x520 ............................................................................ 186
GPIO Commit (GPIOCR), offset 0x524 ............................................................................ 187
GPIO Peripheral Identification 4 (GPIOPeriphID4), offset 0xFD0 ....................................... 189
GPIO Peripheral Identification 5 (GPIOPeriphID5), offset 0xFD4 ....................................... 190
GPIO Peripheral Identification 6 (GPIOPeriphID6), offset 0xFD8 ....................................... 191
GPIO Peripheral Identification 7 (GPIOPeriphID7), offset 0xFDC ...................................... 192
GPIO Peripheral Identification 0 (GPIOPeriphID0), offset 0xFE0 ....................................... 193
GPIO Peripheral Identification 1 (GPIOPeriphID1), offset 0xFE4 ....................................... 194
GPIO Peripheral Identification 2 (GPIOPeriphID2), offset 0xFE8 ....................................... 195
GPIO Peripheral Identification 3 (GPIOPeriphID3), offset 0xFEC ...................................... 196
GPIO PrimeCell Identification 0 (GPIOPCellID0), offset 0xFF0 .......................................... 197
GPIO PrimeCell Identification 1 (GPIOPCellID1), offset 0xFF4 .......................................... 198
GPIO PrimeCell Identification 2 (GPIOPCellID2), offset 0xFF8 .......................................... 199
Preliminary
LM3S1332 Microcontroller
13
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