LM3S1332 Luminary Micro, Inc, LM3S1332 Datasheet - Page 29
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LM3S1332
Manufacturer Part Number
LM3S1332
Description
Lm3s1332 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet
1.LM3S1332.pdf
(447 pages)
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1.4.1
1.4.1.1
1.4.1.2
1.4.1.3
1.4.2
1.4.2.1
July 26, 2008
ARM Cortex™-M3
Processor Core (see page 34)
All members of the Stellaris
around an ARM Cortex™-M3 processor core. The ARM Cortex-M3 processor provides the core for
a high-performance, low-cost platform that meets the needs of minimal memory implementation,
reduced pin count, and low-power consumption, while delivering outstanding computational
performance and exceptional system response to interrupts.
“ARM Cortex-M3 Processor Core” on page 34 provides an overview of the ARM core; the core is
detailed in the ARM® Cortex™-M3 Technical Reference Manual.
System Timer (SysTick) (see page 37)
Cortex-M3 includes an integrated system timer, SysTick. SysTick provides a simple, 24-bit
clear-on-write, decrementing, wrap-on-zero counter with a flexible control mechanism. The counter
can be used in several different ways, for example:
■
■
■
■
■
Nested Vectored Interrupt Controller (NVIC) (see page 42)
The LM3S1332 controller includes the ARM Nested Vectored Interrupt Controller (NVIC) on the
ARM® Cortex™-M3 core. The NVIC and Cortex-M3 prioritize and handle all exceptions. All exceptions
are handled in Handler Mode. The processor state is automatically stored to the stack on an
exception, and automatically restored from the stack at the end of the Interrupt Service Routine
(ISR). The vector is fetched in parallel to the state saving, which enables efficient interrupt entry.
The processor supports tail-chaining, which enables back-to-back interrupts to be performed without
the overhead of state saving and restoration. Software can set eight priority levels on 7 exceptions
(system handlers) and 30 interrupts.
“Interrupts” on page 42 provides an overview of the NVIC controller and the interrupt map. Exceptions
and interrupts are detailed in the ARM® Cortex™-M3 Technical Reference Manual.
Motor Control Peripherals
To enhance motor control, the LM3S1332 controller features Pulse Width Modulation (PWM) outputs.
PWM
Pulse width modulation (PWM) is a powerful technique for digitally encoding analog signal levels.
High-resolution counters are used to generate a square wave, and the duty cycle of the square
wave is modulated to encode an analog signal. Typical applications include switching power supplies
and motor control.
An RTOS tick timer which fires at a programmable rate (for example, 100 Hz) and invokes a
SysTick routine.
A high-speed alarm timer using the system clock.
A variable rate alarm or signal timer—the duration is range-dependent on the reference clock
used and the dynamic range of the counter.
A simple counter. Software can use this to measure time to completion and time used.
An internal clock source control based on missing/meeting durations. The COUNTFLAG bit-field
in the control and status register can be used to determine if an action completed within a set
duration, as part of a dynamic clock management control loop.
®
product family, including the LM3S1332 microcontroller, are designed
Preliminary
LM3S1332 Microcontroller
29
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