LM3S1332 Luminary Micro, Inc, LM3S1332 Datasheet - Page 227
LM3S1332
Manufacturer Part Number
LM3S1332
Description
Lm3s1332 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet
1.LM3S1332.pdf
(447 pages)
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Reset
Reset
Type
Type
GPTM TimerA Interval Load (GPTMTAILR)
Timer0 base: 0x4003.0000
Timer1 base: 0x4003.1000
Timer2 base: 0x4003.2000
Timer3 base: 0x4003.3000
Offset 0x028
Type R/W, reset 0x0000.FFFF (16-bit mode) and 0xFFFF.FFFF (32-bit mode)
July 26, 2008
Bit/Field
31:16
15:0
R/W
R/W
31
15
0
1
R/W
R/W
Register 9: GPTM TimerA Interval Load (GPTMTAILR), offset 0x028
This register is used to load the starting count value into the timer. When GPTM is configured to
one of the 32-bit modes, GPTMTAILR appears as a 32-bit register (the upper 16-bits correspond
to the contents of the GPTM TimerB Interval Load (GPTMTBILR) register). In 16-bit mode, the
upper 16 bits of this register read as 0s and have no effect on the state of GPTMTBILR.
30
14
1
1
R/W
R/W
TAILRH
29
13
TAILRL
1
1
Name
R/W
R/W
28
12
0
1
R/W
R/W
27
11
1
1
Type
R/W
R/W
R/W
R/W
26
10
0
1
(32-bit mode)
(16-bit mode)
0xFFFF
0xFFFF
0x0000
Reset
R/W
R/W
25
1
9
1
Preliminary
R/W
R/W
24
1
8
1
Description
GPTM TimerA Interval Load Register High
When configured for 32-bit mode via the GPTMCFG register, the GPTM
TimerB Interval Load (GPTMTBILR) register loads this value on a
write. A read returns the current value of GPTMTBILR.
In 16-bit mode, this field reads as 0 and does not have an effect on the
state of GPTMTBILR.
GPTM TimerA Interval Load Register Low
For both 16- and 32-bit modes, writing this field loads the counter for
TimerA. A read returns the current value of GPTMTAILR.
TAILRH
TAILRL
R/W
R/W
23
1
7
1
R/W
R/W
22
1
6
1
R/W
R/W
21
0
5
1
R/W
R/W
20
1
4
1
LM3S1332 Microcontroller
R/W
R/W
19
1
3
1
R/W
R/W
18
1
2
1
R/W
R/W
17
1
1
1
R/W
R/W
16
0
0
1
227
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