LM3S1332 Luminary Micro, Inc, LM3S1332 Datasheet - Page 8
LM3S1332
Manufacturer Part Number
LM3S1332
Description
Lm3s1332 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet
1.LM3S1332.pdf
(447 pages)
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Table of Contents
List of Figures
Figure 1-1.
Figure 2-1.
Figure 2-2.
Figure 5-1.
Figure 5-2.
Figure 5-3.
Figure 5-4.
Figure 5-5.
Figure 6-1.
Figure 6-2.
Figure 6-3.
Figure 7-1.
Figure 7-2.
Figure 7-3.
Figure 8-1.
Figure 9-1.
Figure 9-2.
Figure 9-3.
Figure 10-1.
Figure 10-2.
Figure 10-3.
Figure 10-4.
Figure 11-1.
Figure 12-1.
Figure 12-2.
Figure 12-3.
Figure 12-4.
Figure 12-5.
Figure 13-1.
Figure 13-2.
Figure 13-3.
Figure 14-1.
Figure 14-2.
Figure 14-3.
Figure 14-4.
Figure 14-5.
Figure 14-6.
Figure 14-7.
Figure 14-8.
Figure 14-9.
Figure 14-10. MICROWIRE Frame Format (Single Frame) .................................................................... 342
Figure 14-11. MICROWIRE Frame Format (Continuous Transfer) ......................................................... 343
Figure 14-12. MICROWIRE Frame Format, SSIFss Input Setup and Hold Requirements ........................ 343
Figure 15-1.
Figure 15-2.
8
Stellaris
CPU Block Diagram ......................................................................................................... 35
TPIU Block Diagram ........................................................................................................ 36
JTAG Module Block Diagram ............................................................................................ 46
Test Access Port State Machine ....................................................................................... 49
IDCODE Register Format ................................................................................................. 54
BYPASS Register Format ................................................................................................ 55
Boundary Scan Register Format ....................................................................................... 55
External Circuitry to Extend Reset .................................................................................... 57
Power Architecture .......................................................................................................... 59
Main Clock Tree .............................................................................................................. 61
Hibernation Module Block Diagram ................................................................................. 116
Clock Source Using Crystal ............................................................................................ 117
Clock Source Using Dedicated Oscillator ......................................................................... 118
Flash Block Diagram ...................................................................................................... 135
GPIO Port Block Diagram ............................................................................................... 160
GPIODATA Write Example ............................................................................................. 161
GPIODATA Read Example ............................................................................................. 161
GPTM Module Block Diagram ........................................................................................ 202
16-Bit Input Edge Count Mode Example .......................................................................... 206
16-Bit Input Edge Time Mode Example ........................................................................... 207
16-Bit PWM Mode Example ............................................................................................ 208
WDT Module Block Diagram .......................................................................................... 237
ADC Module Block Diagram ........................................................................................... 261
Differential Sampling Range, V
Differential Sampling Range, V
Differential Sampling Range, V
Internal Temperature Sensor Characteristic ..................................................................... 265
UART Module Block Diagram ......................................................................................... 294
UART Character Frame ................................................................................................. 295
IrDA Data Modulation ..................................................................................................... 297
SSI Module Block Diagram ............................................................................................. 334
TI Synchronous Serial Frame Format (Single Transfer) .................................................... 337
TI Synchronous Serial Frame Format (Continuous Transfer) ............................................ 337
Freescale SPI Format (Single Transfer) with SPO=0 and SPH=0 ...................................... 338
Freescale SPI Format (Continuous Transfer) with SPO=0 and SPH=0 .............................. 338
Freescale SPI Frame Format with SPO=0 and SPH=1 ..................................................... 339
Freescale SPI Frame Format (Single Transfer) with SPO=1 and SPH=0 ........................... 340
Freescale SPI Frame Format (Continuous Transfer) with SPO=1 and SPH=0 .................... 340
Freescale SPI Frame Format with SPO=1 and SPH=1 ..................................................... 341
Analog Comparator Module Block Diagram ..................................................................... 372
Structure of Comparator Unit .......................................................................................... 373
®
1000 Series High-Level Block Diagram ............................................................... 28
IN_ODD
IN_ODD
IN_ODD
Preliminary
= 1.5 V .................................................................. 264
= 0.75 V ................................................................ 264
= 2.25 V ................................................................ 265
July 26, 2008
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