LM3S8933 Luminary Micro, Inc, LM3S8933 Datasheet - Page 150

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LM3S8933

Manufacturer Part Number
LM3S8933
Description
Lm3s8933 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet

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Reset
Reset
Type
Type
Internal Memory
Flash Memory Address (FMA)
Base 0x400F.D000
Offset 0x000
Type R/W, reset 0x0000.0000
150
Bit/Field
31:18
17:0
R/W
RO
31
15
0
0
R/W
Register 1: Flash Memory Address (FMA), offset 0x000
During a write operation, this register contains a 4-byte-aligned address and specifies where the
data is written. During erase operations, this register contains a 1 KB-aligned address and specifies
which page is erased. Note that the alignment requirements must be met by software or the results
of the operation are unpredictable.
RO
30
14
0
0
R/W
reserved
OFFSET
RO
29
13
0
0
Name
R/W
RO
28
12
0
0
R/W
RO
27
11
0
0
Type
R/W
RO
R/W
RO
26
10
0
0
Reset
R/W
0x0
0x0
RO
25
0
9
0
reserved
Preliminary
R/W
RO
24
0
8
0
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Address Offset
Address offset in flash where operation is performed, except for
nonvolatile registers (see “Nonvolatile Register Programming” on page
148 for details on values for this field).
OFFSET
R/W
RO
23
0
7
0
R/W
RO
22
0
6
0
R/W
RO
21
0
5
0
R/W
RO
20
0
4
0
R/W
RO
19
0
3
0
R/W
RO
18
0
2
0
July 25, 2008
R/W
R/W
17
0
1
0
OFFSET
R/W
R/W
16
0
0
0

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