LM3S2620 Luminary Micro, Inc, LM3S2620 Datasheet - Page 14

• Manufacturer Part Number: LM3S2620
• Description: Lm3s2620 Arm Microcontroller
• Manufacturer: Luminary Micro, Inc

Table of Contents
Register 3:
Register 4:
Register 5:
Register 6:
Register 7:
Register 8:
Register 9:
Register 10:
Register 11:
Register 12:
Register 13:
Register 14:
Register 15:
Register 16:
Register 17:
Register 18:
General-Purpose Input/Outputs (GPIOs) ................................................................................... 166
Register 1:
Register 2:
Register 3:
Register 4:
Register 5:
Register 6:
Register 7:
Register 8:
Register 9:
Register 10:
Register 11:
Register 12:
Register 13:
Register 14:
Register 15:
Register 16:
Register 17:
Register 18:
Register 19:
Register 20:
Register 21:
Register 22:
Register 23:
Register 24:
Register 25:
Register 26:
Register 27:
Register 28:
Register 29:
Register 30:
Register 31:
14
Flash Memory Control (FMC), offset 0x008 ..................................................................... 149
Flash Controller Raw Interrupt Status (FCRIS), offset 0x00C ............................................ 151
Flash Controller Interrupt Mask (FCIM), offset 0x010 ........................................................ 152
Flash Controller Masked Interrupt Status and Clear (FCMISC), offset 0x014 ..................... 153
USec Reload (USECRL), offset 0x140 ............................................................................ 154
Flash Memory Protection Read Enable 0 (FMPRE0), offset 0x130 and 0x200 ................... 155
Flash Memory Protection Program Enable 0 (FMPPE0), offset 0x134 and 0x400 ............... 156
User Debug (USER_DBG), offset 0x1D0 ......................................................................... 157
User Register 0 (USER_REG0), offset 0x1E0 .................................................................. 158
User Register 1 (USER_REG1), offset 0x1E4 .................................................................. 159
Flash Memory Protection Read Enable 1 (FMPRE1), offset 0x204 .................................... 160
Flash Memory Protection Read Enable 2 (FMPRE2), offset 0x208 .................................... 161
Flash Memory Protection Read Enable 3 (FMPRE3), offset 0x20C ................................... 162
Flash Memory Protection Program Enable 1 (FMPPE1), offset 0x404 ............................... 163
Flash Memory Protection Program Enable 2 (FMPPE2), offset 0x408 ............................... 164
Flash Memory Protection Program Enable 3 (FMPPE3), offset 0x40C ............................... 165
GPIO Data (GPIODATA), offset 0x000 ............................................................................ 173
GPIO Direction (GPIODIR), offset 0x400 ......................................................................... 174
GPIO Interrupt Sense (GPIOIS), offset 0x404 .................................................................. 175
GPIO Interrupt Both Edges (GPIOIBE), offset 0x408 ........................................................ 176
GPIO Interrupt Event (GPIOIEV), offset 0x40C ................................................................ 177
GPIO Interrupt Mask (GPIOIM), offset 0x410 ................................................................... 178
GPIO Raw Interrupt Status (GPIORIS), offset 0x414 ........................................................ 179
GPIO Masked Interrupt Status (GPIOMIS), offset 0x418 ................................................... 180
GPIO Interrupt Clear (GPIOICR), offset 0x41C ................................................................ 181
GPIO Alternate Function Select (GPIOAFSEL), offset 0x420 ............................................ 182
GPIO 2-mA Drive Select (GPIODR2R), offset 0x500 ........................................................ 184
GPIO 4-mA Drive Select (GPIODR4R), offset 0x504 ........................................................ 185
GPIO 8-mA Drive Select (GPIODR8R), offset 0x508 ........................................................ 186
GPIO Open Drain Select (GPIOODR), offset 0x50C ......................................................... 187
GPIO Pull-Up Select (GPIOPUR), offset 0x510 ................................................................ 188
GPIO Pull-Down Select (GPIOPDR), offset 0x514 ........................................................... 189
GPIO Slew Rate Control Select (GPIOSLR), offset 0x518 ................................................ 190
GPIO Digital Enable (GPIODEN), offset 0x51C ................................................................ 191
GPIO Lock (GPIOLOCK), offset 0x520 ............................................................................ 192
GPIO Commit (GPIOCR), offset 0x524 ............................................................................ 193
GPIO Peripheral Identification 4 (GPIOPeriphID4), offset 0xFD0 ....................................... 195
GPIO Peripheral Identification 5 (GPIOPeriphID5), offset 0xFD4 ....................................... 196
GPIO Peripheral Identification 6 (GPIOPeriphID6), offset 0xFD8 ....................................... 197
GPIO Peripheral Identification 7 (GPIOPeriphID7), offset 0xFDC ...................................... 198
GPIO Peripheral Identification 0 (GPIOPeriphID0), offset 0xFE0 ....................................... 199
GPIO Peripheral Identification 1 (GPIOPeriphID1), offset 0xFE4 ....................................... 200
GPIO Peripheral Identification 2 (GPIOPeriphID2), offset 0xFE8 ....................................... 201
GPIO Peripheral Identification 3 (GPIOPeriphID3), offset 0xFEC ...................................... 202
GPIO PrimeCell Identification 0 (GPIOPCellID0), offset 0xFF0 .......................................... 203
GPIO PrimeCell Identification 1 (GPIOPCellID1), offset 0xFF4 .......................................... 204
GPIO PrimeCell Identification 2 (GPIOPCellID2), offset 0xFF8 .......................................... 205
Preliminary
July 25, 2008