LM3S2620 Luminary Micro, Inc, LM3S2620 Datasheet - Page 15

• Manufacturer Part Number: LM3S2620
• Description: Lm3s2620 Arm Microcontroller
• Manufacturer: Luminary Micro, Inc

Register 32:
General-Purpose Timers ............................................................................................................. 207
Register 1:
Register 2:
Register 3:
Register 4:
Register 5:
Register 6:
Register 7:
Register 8:
Register 9:
Register 10:
Register 11:
Register 12:
Register 13:
Register 14:
Register 15:
Register 16:
Register 17:
Register 18:
Watchdog Timer ........................................................................................................................... 243
Register 1:
Register 2:
Register 3:
Register 4:
Register 5:
Register 6:
Register 7:
Register 8:
Register 9:
Register 10:
Register 11:
Register 12:
Register 13:
Register 14:
Register 15:
Register 16:
Register 17:
Register 18:
Register 19:
Register 20:
Universal Asynchronous Receivers/Transmitters (UARTs) ..................................................... 266
Register 1:
Register 2:
Register 3:
Register 4:
Register 5:
Register 6:
July 25, 2008
GPIO PrimeCell Identification 3 (GPIOPCellID3), offset 0xFFC ......................................... 206
GPTM Configuration (GPTMCFG), offset 0x000 .............................................................. 219
GPTM TimerA Mode (GPTMTAMR), offset 0x004 ............................................................ 220
GPTM TimerB Mode (GPTMTBMR), offset 0x008 ............................................................ 222
GPTM Control (GPTMCTL), offset 0x00C ........................................................................ 224
GPTM Interrupt Mask (GPTMIMR), offset 0x018 .............................................................. 227
GPTM Raw Interrupt Status (GPTMRIS), offset 0x01C ..................................................... 229
GPTM Masked Interrupt Status (GPTMMIS), offset 0x020 ................................................ 230
GPTM Interrupt Clear (GPTMICR), offset 0x024 .............................................................. 231
GPTM TimerA Interval Load (GPTMTAILR), offset 0x028 ................................................. 233
GPTM TimerB Interval Load (GPTMTBILR), offset 0x02C ................................................ 234
GPTM TimerA Match (GPTMTAMATCHR), offset 0x030 ................................................... 235
GPTM TimerB Match (GPTMTBMATCHR), offset 0x034 .................................................. 236
GPTM TimerA Prescale (GPTMTAPR), offset 0x038 ........................................................ 237
GPTM TimerB Prescale (GPTMTBPR), offset 0x03C ....................................................... 238
GPTM TimerA Prescale Match (GPTMTAPMR), offset 0x040 ........................................... 239
GPTM TimerB Prescale Match (GPTMTBPMR), offset 0x044 ........................................... 240
GPTM TimerA (GPTMTAR), offset 0x048 ........................................................................ 241
GPTM TimerB (GPTMTBR), offset 0x04C ....................................................................... 242
Watchdog Load (WDTLOAD), offset 0x000 ...................................................................... 246
Watchdog Value (WDTVALUE), offset 0x004 ................................................................... 247
Watchdog Control (WDTCTL), offset 0x008 ..................................................................... 248
Watchdog Interrupt Clear (WDTICR), offset 0x00C .......................................................... 249
Watchdog Raw Interrupt Status (WDTRIS), offset 0x010 .................................................. 250
Watchdog Masked Interrupt Status (WDTMIS), offset 0x014 ............................................. 251
Watchdog Test (WDTTEST), offset 0x418 ....................................................................... 252
Watchdog Lock (WDTLOCK), offset 0xC00 ..................................................................... 253
Watchdog Peripheral Identification 4 (WDTPeriphID4), offset 0xFD0 ................................. 254
Watchdog Peripheral Identification 5 (WDTPeriphID5), offset 0xFD4 ................................. 255
Watchdog Peripheral Identification 6 (WDTPeriphID6), offset 0xFD8 ................................. 256
Watchdog Peripheral Identification 7 (WDTPeriphID7), offset 0xFDC ................................ 257
Watchdog Peripheral Identification 0 (WDTPeriphID0), offset 0xFE0 ................................. 258
Watchdog Peripheral Identification 1 (WDTPeriphID1), offset 0xFE4 ................................. 259
Watchdog Peripheral Identification 2 (WDTPeriphID2), offset 0xFE8 ................................. 260
Watchdog Peripheral Identification 3 (WDTPeriphID3), offset 0xFEC ................................. 261
Watchdog PrimeCell Identification 0 (WDTPCellID0), offset 0xFF0 .................................... 262
Watchdog PrimeCell Identification 1 (WDTPCellID1), offset 0xFF4 .................................... 263
Watchdog PrimeCell Identification 2 (WDTPCellID2), offset 0xFF8 .................................... 264
Watchdog PrimeCell Identification 3 (WDTPCellID3 ), offset 0xFFC .................................. 265
UART Data (UARTDR), offset 0x000 ............................................................................... 274
UART Receive Status/Error Clear (UARTRSR/UARTECR), offset 0x004 ........................... 276
UART Flag (UARTFR), offset 0x018 ................................................................................ 278
UART IrDA Low-Power Register (UARTILPR), offset 0x020 ............................................. 280
UART Integer Baud-Rate Divisor (UARTIBRD), offset 0x024 ............................................ 281
UART Fractional Baud-Rate Divisor (UARTFBRD), offset 0x028 ....................................... 282
Preliminary
LM3S2620 Microcontroller
15