LM3S2730 Luminary Micro, Inc, LM3S2730 Datasheet - Page 368
LM3S2730
Manufacturer Part Number
LM3S2730
Description
Lm3s2730 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet
1.LM3S2730.pdf
(423 pages)
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Signal Tables
368
Pin Number
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
Pin Name
VDD25
CMOD0
CMOD1
OSC0
OSC1
CCP0
CCP2
PF5
PF0
GND
VDD
VDD
GND
PF4
PF3
PF2
PF1
GND
RST
PB0
PB1
VDD
GND
PB2
PB3
PE0
PE1
PE2
PE3
PC3
TDO
SWO
NC
NC
NC
NC
Preliminary
Pin Type
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
O
-
-
-
-
-
-
-
-
-
-
-
-
I
I
Buffer Type
Analog
Analog
Power
Power
Power
Power
Power
Power
Power
Power
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
-
-
-
-
Description
GPIO port F bit 5
GPIO port F bit 0
Main oscillator crystal input or an external
clock reference input.
Main oscillator crystal output.
No connect. Leave the pin electrically
unconnected/isolated.
No connect. Leave the pin electrically
unconnected/isolated.
No connect. Leave the pin electrically
unconnected/isolated.
No connect. Leave the pin electrically
unconnected/isolated.
Ground reference for logic and I/O pins.
Positive supply for I/O and some logic.
Positive supply for I/O and some logic.
Ground reference for logic and I/O pins.
GPIO port F bit 4
GPIO port F bit 3
GPIO port F bit 2
GPIO port F bit 1
Positive supply for most of the logic function,
including the processor core and most
peripherals.
Ground reference for logic and I/O pins.
System reset input.
CPU Mode bit 0. Input must be set to logic 0
(grounded); other encodings reserved.
GPIO port B bit 0
Capture/Compare/PWM 0
GPIO port B bit 1
Capture/Compare/PWM 2
Positive supply for I/O and some logic.
Ground reference for logic and I/O pins.
GPIO port B bit 2
GPIO port B bit 3
GPIO port E bit 0
GPIO port E bit 1
GPIO port E bit 2
GPIO port E bit 3
CPU Mode bit 1. Input must be set to logic 0
(grounded); other encodings reserved.
GPIO port C bit 3
JTAG TDO and SWO
JTAG TDO and SWO
July 25, 2008
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