LM3S2730 Luminary Micro, Inc, LM3S2730 Datasheet - Page 86

• Manufacturer Part Number: LM3S2730
• Description: Lm3s2730 Arm Microcontroller
• Manufacturer: Luminary Micro, Inc

Reset
Reset
Type
Type
System Control
Device Capabilities 2 (DC2)
Base 0x400F.E000
Offset 0x014
Type RO, reset 0x0307.0011
86
Bit/Field
31:26
23:19
15:5
25
24
18
17
16
4
RO
RO
31
15
0
0
Register 15: Device Capabilities 2 (DC2), offset 0x014
This register provides a list of features available in the system. The Stellaris family uses this register
format to indicate the availability of the following family features in the specific device: Analog
Comparators, General-Purpose Timers, I2Cs, QEIs, SSIs, and UARTs. The format of this register
is consistent with the RCGC1, SCGC1, and DCGC1 clock control registers and the SRCR1 software
reset control register.
RO
RO
30
14
0
0
reserved
reserved
reserved
RO
RO
TIMER2
TIMER1
TIMER0
COMP1
COMP0
29
13
0
0
Name
SSI0
reserved
RO
RO
28
12
0
0
RO
RO
27
11
0
0
Type
RO
RO
RO
RO
RO
RO
RO
RO
RO
reserved
RO
RO
26
10
0
0
COMP1
Reset
RO
RO
25
1
9
0
0
1
1
0
1
1
1
0
1
Preliminary
COMP0
RO
RO
24
1
8
0
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Analog Comparator 1 Present
When set, indicates that analog comparator 1 is present.
Analog Comparator 0 Present
When set, indicates that analog comparator 0 is present.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Timer 2 Present
When set, indicates that General-Purpose Timer module 2 is present.
Timer 1 Present
When set, indicates that General-Purpose Timer module 1 is present.
Timer 0 Present
When set, indicates that General-Purpose Timer module 0 is present.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
SSI0 Present
When set, indicates that SSI module 0 is present.
RO
RO
23
0
7
0
RO
RO
22
0
6
0
reserved
RO
RO
21
0
5
0
SSI0
RO
RO
20
0
4
1
RO
RO
19
0
3
0
reserved
TIMER2
RO
RO
18
1
2
0
July 25, 2008
TIMER1
RO
RO
17
1
1
0
TIMER0
UART0
RO
RO
16
1
0
1