LM3S2730 Luminary Micro, Inc, LM3S2730 Datasheet - Page 386
LM3S2730
Manufacturer Part Number
LM3S2730
Description
Lm3s2730 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet
1.LM3S2730.pdf
(423 pages)
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Signal Tables
386
SSI
System Control &
Clocks
Function
GND
GND
GND
GNDA
GNDA
LDO
VDD
VDD25
VDD25
VDD25
VDD25
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDDA
VDDA
SSI0Clk
SSI0Fss
SSI0Rx
SSI0Tx
CMOD0
Pin Name
Number
G12
H10
G10
F12
L12
E10
G11
E11
Pin
F11
M4
M5
B6
B5
A5
E3
C3
D3
G3
K7
K8
K9
C6
C7
F3
L4
L5
Preliminary
Pin Type
I/O
I/O
I/O
O
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
I
Buffer
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Type
TTL
TTL
TTL
TTL
TTL
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
The ground reference for the analog circuits (ADC,
Analog Comparators, etc.). These are separated
from GND to minimize the electrical noise contained
on VDD from affecting the analog functions.
The ground reference for the analog circuits (ADC,
Analog Comparators, etc.). These are separated
from GND to minimize the electrical noise contained
on VDD from affecting the analog functions.
Low drop-out regulator output voltage. This pin
requires an external capacitor between the pin and
GND of 1 µF or greater. The LDO pin must also be
connected to the VDD25 pins at the board level in
addition to the decoupling capacitor(s).
Positive supply for I/O and some logic.
Positive supply for most of the logic function,
including the processor core and most peripherals.
Positive supply for most of the logic function,
including the processor core and most peripherals.
Positive supply for most of the logic function,
including the processor core and most peripherals.
Positive supply for most of the logic function,
including the processor core and most peripherals.
Positive supply for I/O and some logic.
Positive supply for I/O and some logic.
Positive supply for I/O and some logic.
Positive supply for I/O and some logic.
Positive supply for I/O and some logic.
Positive supply for I/O and some logic.
Positive supply for I/O and some logic.
Positive supply for I/O and some logic.
The positive supply (3.3 V) for the analog circuits
(ADC, Analog Comparators, etc.). These are
separated from VDD to minimize the electrical noise
contained on VDD from affecting the analog
functions.
The positive supply (3.3 V) for the analog circuits
(ADC, Analog Comparators, etc.). These are
separated from VDD to minimize the electrical noise
contained on VDD from affecting the analog
functions.
SSI module 0 clock
SSI module 0 frame
SSI module 0 receive
SSI module 0 transmit
CPU Mode bit 0. Input must be set to logic 0
(grounded); other encodings reserved.
Description
July 25, 2008
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