LM3S3759 Luminary Micro, Inc, LM3S3759 Datasheet - Page 25

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LM3S3759

Manufacturer Part Number
LM3S3759
Description
Lm3s3759 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet
June 02, 2008
Internal Memory
DMA Controller
Integrated Nested Vectored Interrupt Controller (NVIC) providing deterministic interrupt
handling
33 interrupts with eight priority levels
Memory protection unit (MPU), providing a privileged mode for protected operating system
functionality
Unaligned data access, enabling data to be efficiently packed into memory
Atomic bit manipulation (bit-banding), delivering maximum memory utilization and streamlined
peripheral control
128 KB single-cycle flash
64 KB single-cycle SRAM
Pre-programmed ROM containing the Stellaris
and Stellaris
ARM PrimeCell® 32-channel configurable µDMA controller
Support for multiple transfer modes:
Dedicated channels for supported peripherals
One channel each for receive and transmit path for bidirectional peripherals
Dedicated channel for software-initiated transfers
Independently configured and operated channels
Per-channel configurable bus arbitration scheme
Two levels of priority
Design optimizations for improved bus access performance between µDMA controller and
the processor core:
User-managed flash block protection on a 2-KB block basis
User-managed flash data programming
User-defined and managed flash-protection block
Basic, for simple transfer scenarios
Ping-pong, for continuous data flow to/from peripherals
Scatter-gather, from a programmable list of arbitrary transfers initiated from a single request
µDMA controller access is subordinate to core access
®
boot loader
Preliminary
®
family peripheral driver library (DriverLib)
LM3S3759 Microcontroller
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