LM3S3759 Luminary Micro, Inc, LM3S3759 Datasheet - Page 527

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LM3S3759

Manufacturer Part Number
LM3S3759
Description
Lm3s3759 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet
Reset
Type
USBDEVCTL Device Mode
USB Device Control (USBDEVCTL)
Base 0x4005.0000
Offset 0x060
Type R/W, reset 0x80
June 02, 2008
Bit/Field
4:3
DEV
2
1
0
RO
7
1
RO
6
0
reserved
HOSTREQ
SESSION
RO
5
0
Name
VBUS
HOST
RO
4
0
VBUS
RO
3
0
Type
R/W
R/W
RO
RO
reserved
RO
2
0
HOSTREQ
R/W
Reset
0x00
1
0
0
0
0
SESSION
Preliminary
R/W
0
0
Description
VBus Level
These read-only bits encode the current VBus level as follows:
Host Mode
This read-only bit is set when the USB controller is acting as a Host.
Host Request
When set, the USB controller initiates the Host Negotiation when
Suspend mode is entered. It is cleared when Host Negotiation is
completed.
Session Start/End
When operating as an OTG A device, this bit is set or cleared by the
CPU to start or end a session.
When operating as an OTG B device, this bit is set or cleared by the
USB controller when a session starts or ends. It is also set by the CPU
to initiate the Session Request Protocol. When the USB controller is in
Suspend mode, the bit may be cleared by the CPU to perform a software
disconnect.
Note:
Value
0x0
0x1
0x2
0x3
Description
Below SessionEnd
VBUS is detected as under 0.5 V.
Above SessionEnd, below AValid
VBUS is detected as above 0.5 V and under 1.5 V.
Above AValid, below VBusValid
VBUS is detected as above 1.5 V and below 4.5 V.
Above VBusValid
VBUS is detected as above 4.5 V.
Clearing this bit when the core is not suspended will result in
undefined behavior.
LM3S3759 Microcontroller
527

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