LM3S3759 Luminary Micro, Inc, LM3S3759 Datasheet - Page 561
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LM3S3759
Manufacturer Part Number
LM3S3759
Description
Lm3s3759 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet
1.LM3S3759.pdf
(666 pages)
- Current page: 561 of 666
- Download datasheet (6Mb)
June 02, 2008
Bit/Field
7
6
5
4
3
DMAMOD
AUTORQ
AUTOCL
PIDERR
DMAEN
Name
Type
R/W
R/W
R/W
R/W
RO
Reset
0
0
0
0
0
Preliminary
Description
Auto Clear
If the CPU sets this bit, then the RXRDY bit is automatically cleared when
a packet of USBRXMAXPn bytes has been unloaded from the receive
FIFO. When packets of less than the maximum packet size are unloaded,
RXRDY must be cleared manually. When using a DMA to unload the
receive FIFO, data is read from the receive FIFO in 4 byte chunks
regardless of the RxMaxP. Therefore, the RXRDY bit is cleared as follows.
Remainder (RxMaxP/4)
Actual Bytes Read
Packet Sizes that will clear RXRDY
Note:
Auto Request
If the CPU sets this bit, the ReqPkt bit is automatically set when the
RXRDY bit is cleared.
Note:
DMA Request Enable
The CPU sets this bit to enable the DMA request for the receive endpoint.
PID Error
For ISO transactions, the core sets this bit to indicate a PID error in the
received packet. This bit is ignored in bulk or interrupt transactions.
DMA Request Mode
The CPU sets this bit to select DMA Request Mode 1 and clears it to
select DMA Request Mode 0.
Value
0
1
2
3
Value
0
1
2
3
Value
0
1
2
3
Description
RXMaxP = 64 bytes
RXMaxP = 61 bytes
RXMaxP = 62 bytes
RXMaxP = 63 bytes
Description
RXMAXP
RXMAXP+3
RXMAXP+2
RXMAXP+1
Description
RXMAXP, RXMAXP-1, RXMAXP-2, RXMAXP-3
RXMAXP
RXMAXP, RXMAXP-1
RXMAXP, RXMAXP-1, RXMAXP-2
This bit should not be set for high-bandwidth isochronous
endpoints.
This bit is automatically cleared when a short packet is
received.
LM3S3759 Microcontroller
561
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