LM3S310 Luminary Micro, Inc, LM3S310 Datasheet - Page 311

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LM3S310

Manufacturer Part Number
LM3S310
Description
Lm3s310 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet

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16
Table 16-1. Signals by Pin Number (Sheet 1 of 4)
July 5, 2006
Number
Pin
10
12
11
1
2
3
4
5
6
7
8
9
Signal Tables
The following tables list the signals available for each pin. Functionality is enabled by software with
the GPIOAFSEL register (see page 120).
Important:
Table 16-1 shows the pin-to-signal-name mapping, including functional characteristics of the
signals. Table 16-2 lists the signals in alphabetical order by signal name. Table 16-3 groups the
signals by functionality, except for GPIOs. Table 16-4 lists the GPIO pins and their alternate
functionality.
PE5
CCP5
PE4
CCP3
PE3
CCP1
PE2
CCP4
RST
LDO
VDD
GND
OSC0
OSC1
PC7
C2–
PC6
C2o
C2+
Pin Name
All multiplexed pins are GPIOs by default, with the exception of the five JTAG pins
(PB7 and PC[3:0]) which default to the JTAG functionality.
Type
Pin
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
I
-
-
-
I
I
I
Analog
Analog
Analog
Analog
Buffer
Power
Power
Power
Type
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
Preliminary
GPIO port E bit 5.
Timer 2 capture input, compare output, or PWM output channel 5.
GPIO port E bit 4.
Timer 1 capture input, compare output, or PWM output channel 3.
GPIO port E bit 3.
Timer 0 capture input, compare output, or PWM output channel 1.
GPIO port E bit 2.
Timer 2 capture input, compare output, or PWM output channel 4.
System reset input.
The linear drop-out regulator output voltage. This pin requires an
external capacitor between the pin and GND of 1 μF or greater.
Positive supply for logic and I/O pins.
Ground reference for logic and I/O pins.
Oscillator crystal input or an external clock reference input.
Oscillator crystal output.
GPIO port C bit 7.
Analog comparator 2 negative-reference input.
GPIO port C bit 6.
Analog comparator 2 output.
Analog comparator 2 positive-reference input.
Description
LM3S310 Data Sheet
311

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