LM3S317 Luminary Micro, Inc, LM3S317 Datasheet - Page 227

• Manufacturer Part Number: LM3S317
• Description: Lm3s317 Arm Microcontroller
• Manufacturer: Luminary Micro, Inc

February 6, 2007
Reset
Reset
Reset
Reset
Type
Type
Type
Type
Read-Only Register
Bit/Field
31:10
ADC Test Mode Loopback (ADCTMLB): Read
Offset 0x100
ADC Test Mode Loopback (ADCTMLB):Write
Offset 0x100
9:6
2:0
5
4
3
RO
RO
RO
RO
31
15
31
15
0
0
0
0
Register 27: ADC Test Mode Loopback (ADCTMLB), offset 0x100
This register provides loopback operation within the digital logic of the ADC, which can be useful in
debugging software without having to provide actual analog stimulus. This test mode is entered by
writing a value of 0x00000001 to this register. When data is read from the FIFO in loopback mode,
the read-only portion of this register is returned.
RO
RO
RO
RO
30
14
30
14
0
0
0
0
reserved
CONT
Name
DIFF
MUX
CNT
TS
RO
RO
RO
RO
29
13
29
13
0
0
0
0
reserved
RO
RO
RO
RO
28
12
28
12
0
0
0
0
Type
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
27
11
27
11
0
0
0
0
RO
RO
RO
RO
26
10
26
10
0
0
0
0
Reset
0
0
0
0
0
0
RO
RO
RO
RO
25
25
0
9
0
0
9
0
Preliminary
reserved
Description
Reserved bits return an indeterminate value, and should never
be changed.
Continuous sample counter that is initialized to 0 and counts
each sample as it processed. This helps provide a unique value
for the data received.
When set, indicates that this is a continuation sample. For
example if two sequencers were to run back-to-back, this
indicates that the controller kept continuously sampling at full
rate.
When set, indicates that this was to be a differential sample.
When set, indicates that this was to be a temperature sensor
sample.
Indicate which analog input was to be sampled.
RO
RO
RO
RO
24
24
0
8
0
0
8
0
reserved
reserved
CNT
RO
RO
RO
RO
23
23
0
7
0
0
7
0
RO
RO
RO
RO
22
22
0
6
0
0
6
0
CONT
RO
RO
RO
RO
21
21
0
5
0
0
5
0
DIFF
RO
RO
RO
RO
20
20
0
4
0
0
4
0
RO
RO
19
TS
RO
19
RO
0
3
0
0
3
0
LM3S317 Data Sheet
RO
RO
RO
RO
18
18
0
2
0
0
2
0
MUX
RO
RO
17
RO
17
RO
0
1
0
0
1
0
WO
RO
RO
LB
16
RO
16
0
0
0
0
0
0
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