MT18LSDT6472 Micron, MT18LSDT6472 Datasheet - Page 19

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MT18LSDT6472

Manufacturer Part Number
MT18LSDT6472
Description
168-Pin SDRAM DIMMs (x72) ECC
Manufacturer
Micron
Datasheet
EEPROM DEVICE SELECT CODE
(THE MOST SIGNIFICANT BIT (B7) IS SENT FIRST)
SPD EEPROM TIMING DIAGRAM
SERIAL PRESENCE-DETECT EEPROM TIMING PARAMETERS
16, 32, 64 Meg x 72 PC133/PC100 Registered SDRAM DIMMs
SD18C16_32_64x72G_B.p65 – Pub. 11/01
EEPROM OPERATING MODES
(X = V
MEMORY AREA SELECT CODE (TWO ARRAYS)
PROTECTION REGISTER SELECT CODE
SYMBOL
t
t
t
t
t
t
CURRENT ADDRESS READ
RANDOM ADDRESS READ
SEQUENTIAL READ
BYTE WRITE
PAGE WRITE
AA
BUF
DH
F
HD:DAT
HD:STA
SDA OUT
SDA IN
IH
SCL
OR V
MODE
IL
)
t SU:STA
MIN
300
0.3
4.7
RW BIT
0
4
t F
1
0
1
1
0
0
t HD:STA
MAX
t LOW
300
3.5
t AA
B7
1
0
UNITS
WC
V
V
µs
µs
ns
ns
µs
µs
DEVICE TYPE IDENTIFIER
X
X
X
X
IL
IL
t HIGH
1
t HD:DAT
B6
0
1
19
168-PIN REGISTERED SDRAM DIMM
128MB / 256MB / 512MB (x72, ECC)
BYTES
SYMBOL
t
t
t
t
t
t
t DH
1
1
1
HIGH
LOW
R
SU:DAT
SU:STA
SU:STO
16
1
B5
1
1
t R
t SU:DAT
START, DEVICE SELECT, RW = 1
START, DEVICE SELECT, RW = 0, ADDRESS
RESTART, DEVICE SELECT, RW = 1
SIMILAR TO CURRENT OR RANDOM ADDRESS READ
START, DEVICE SELECT, RW = 0
START, DEVICE SELECT, RW = 0
B4
Micron Technology, Inc., reserves the right to change products or specifications without notice.
0
0
B3
E2
E2
INITIAL SEQUENCE
CHIP ENABLE
B2
E1
E1
MIN
250
4.7
4.7
4.7
t SU:STO
4
t BUF
B1
E0
E0
UNDEFINED
©2001, Micron Technology, Inc.
MAX
1
RW
RW
RW
B0
UNITS
µs
µs
µs
ns
µs
µs

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