MT29F2G08AACWP Micron, MT29F2G08AACWP Datasheet

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MT29F2G08AACWP

Manufacturer Part Number
MT29F2G08AACWP
Description
NAND Flash Memory; Density: 2Gb; Organization: 256Mbx8; Bits/Cell: SLC; I/O: Common; Supply Voltage: 3.3V; Operating Temperature Range: 0° to +70°C; Package: 48-TSOP
Manufacturer
Micron
Datasheet

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NAND Flash Memory
MT29F2G08AACWP, MT29F4G08BACWP, MT29F8G08FACWP
For the latest data sheet, refer to the Micron Web site: www.micron.com/products/nand/
Features
• Organization
• READ performance
• WRITE performance
• Endurance: 100,000 PROGRAM/ERASE cycles
• First block (block address 00h) guaranteed to be
• V
• Automated PROGRAM and ERASE
• Basic NAND Flash command set:
• New commands:
• Operation status byte provides a software method of
• READY/BUSY (R/B#) pin provides a hardware
• WP# pin: hardware write protect
PDF: 09005aef814b01a2 / Source: 09005aef814b01c7
2_4_8gb_nand_m49a__1.fm - Rev. D 12/06 EN
– Page size x8: 2,112 bytes (2,048 + 64 bytes)
– Page size x16: 1,056 words (1,024 + 32 words)
– Block size: 64 pages (128K + 4K bytes)
– Device size: 2Gb: 2,048 blocks; 4Gb: 4,096 blocks;
– Random READ: 25µs
– Sequential READ: 30ns (3V x8 only)
– PROGRAM PAGE: 300µs (TYP)
– BLOCK ERASE: 2ms (TYP)
– PAGE READ, READ for INTERNAL DATA MOVE,
– PAGE READ CACHE MODE
– One-time programmable (OTP), including:
– READ UNIQUE ID (contact factory)
– READ ID2 (contact factory)
– PROGRAM/ERASE operation completion
– PROGRAM/ERASE pass/fail condition
– Write-protect status
valid without ECC (up to 1,000 PROGRAM/ERASE
cycles)
detecting:
method of detecting PROGRAM or ERASE cycle
completion
8Gb: 8,192 blocks
RANDOM DATA READ, READ ID, READ STATUS,
PROGRAM PAGE, RANDOM DATA INPUT, PRO-
GRAM PAGE CACHE MODE, PROGRAM for
INTERNAL DATA MOVE, BLOCK ERASE, RESET
CC
OTP DATA PROGRAM, OTP DATA PROTECT,
OTP DATA READ
: 1.70V–1.95V
Products and specifications discussed herein are subject to change by Micron without notice.
1
or 2.7V–3.6V
1
2Gb, 4Gb, 8Gb: x8, x16 NAND Flash Memory
Figure 1:
Options
• Density:
• Device width:
• Configuration:
• V
• Third-generation die
• Package:
• Operating temperature:
Notes: 1. Packaged parts are only available for 3V x8
– 2Gb (single die)
– 4Gb (dual-die stack)
– 8Gb (quad-die stack)
– x8
– x16
– 2.7V–3.6V
– 1.70V–1.95V
– 48-Pin TSOP type I (lead-free)
– Commercial (0°C to 70°C)
– Extended (–40°C to +85°C)
CC
Micron Technology, Inc., reserves the right to change products or specifications without notice.
:
2. For ET devices, contact factory.
1
# of die # of CE# # of R/B#
devices. For 1.8V or x16 devices, contact
factory.
1
2
4
48-Pin TSOP Type 1
1
1
1
2
©2005 Micron Technology, Inc. All rights reserved.
2
1
1
2
MT29Fxx08x
MT29Fxx16x
Marking
MT29F2G
MT29F4G
MT29F8G
None
Features
WP
ET
A
B
A
B
C
F

Related parts for MT29F2G08AACWP

MT29F2G08AACWP Summary of contents

Page 1

... NAND Flash Memory MT29F2G08AACWP, MT29F4G08BACWP, MT29F8G08FACWP For the latest data sheet, refer to the Micron Web site: www.micron.com/products/nand/ Features • Organization – Page size x8: 2,112 bytes (2,048 + 64 bytes) – Page size x16: 1,056 words (1,024 + 32 words) – Block size: 64 pages (128K + 4K bytes) – ...

Page 2

... Rev. D 12/06 EN 2Gb, 4Gb, 8Gb: x8, x16 NAND Flash Memory ® NAND Flash devices are available in several different configurations and Micron Technology, Inc., reserves the right to change products or specifications without notice. 2 Part Numbering Information ES :C Design Revision C = First generation Production Status ...

Page 3

... Power Cycling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .39 CC Timing Diagrams .44 Package Dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .57 PDF: 09005aef814b01a2 / Source: 09005aef814b01c7 2_4_8gb_nand_m49aTOC.fm - Rev. D 12/06 EN 2Gb, 4Gb, 8Gb: x8, x16 NAND Flash Memory Micron Technology, Inc., reserves the right to change products or specifications without notice. 3 ©2005 Micron Technology, Inc. All rights reserved. Table of Contents ...

Page 4

... Figure 54: RESET Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56 Figure 55: TSOP Type PDF: 09005aef814b01a2 / Source: 09005aef814b01c7 2_4_8gb_nand_m49aLOF.fm - Rev. D 12/06 EN 2Gb, 4Gb, 8Gb: x8, x16 NAND Flash Memory Micron Technology, Inc., reserves the right to change products or specifications without notice. 4 ©2005 Micron Technology, Inc. All rights reserved. List of Figures ...

Page 5

... Table 21: AC Characteristics: Normal Operation Table 22: PROGRAM/ERASE Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 PDF: 09005aef814b01a2 / Source: 09005aef814b01c7 2_4_8gb_nand_m49aLOT.fm - Rev. D 12/06 EN 2Gb, 4Gb, 8Gb: x8, x16 NAND Flash Memory Micron Technology, Inc., reserves the right to change products or specifications without notice. 5 ©2005 Micron Technology, Inc. All rights reserved. List of Tables ...

Page 6

... These devices include standard NAND Flash features as well as new features designed to enhance system-level performance. Micron NAND Flash devices use a highly multiplexed 8- or 16-bit bus (I/O[7:0] or I/O[15:0]) to transfer data, addresses, and instructions. The five command pins (CLE, ALE, CE#, RE#, WE#) implement the NAND Flash command bus interface protocol. Two additional pins control hardware write protection (WP#) and monitor device status (R/B#) ...

Page 7

... Pin Assignments and Descriptions Micron Technology, Inc., reserves the right to change products or specifications without notice. 7 ©2005 Micron Technology, Inc. All rights reserved. x8 x16 I/O15 NC I/O7 NC I/O14 I/O7 I/O6 I/O6 I/O13 I/O5 I/O5 I/O4 I/O12 NC I/O4 NC ...

Page 8

... Ground connection connect: NC pins are not internally connected. These pins can be driven or left unconnected. Do not use: These pins must be left unconnected. Micron Technology, Inc., reserves the right to change products or specifications without notice. 8 ©2005 Micron Technology, Inc. All rights reserved. ...

Page 9

... PDF: 09005aef814b01a2 / Source: 09005aef814b01c7 2_4_8gb_nand_m49a__2.fm - Rev. D 12/06 EN 2Gb, 4Gb, 8Gb: x8, x16 NAND Flash Memory Micron Technology, Inc., reserves the right to change products or specifications without notice. 9 ©2005 Micron Technology, Inc. All rights reserved. Architecture ...

Page 10

... Memory Mapping 2,047 2,047 • • • Spare area Out-of-Bounds Addresses in Page 0x0000000840–0x0000000FFF 0x0000010840–0x0000010FFF 0x0000020840–0x0000020FFF 0x01FFFE0840–0x01FFFE0FFF 0x01FFFF0840–0x01FFFF0FFF Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2005 Micron Technology, Inc. All rights reserved. 2,111 ...

Page 11

... Memory Mapping 2,047 1,023 • • • Spare area Out-of-Bounds Addresses in Page 0x0000000420–0x0000000FFF 0x0000010420–0x0000010FFF 0x0000020420–0x0000020FFF 0x01FFFE0420–0x01FFFE0FFF 0x01FFFF0420–0x01FFFF0FFF Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2005 Micron Technology, Inc. All rights reserved. 1,055 ...

Page 12

... CA3 LOW LOW CA11 PA5 PA4 PA3 BA13 BA12 BA11 LOW LOW LOW Micron Technology, Inc., reserves the right to change products or specifications without notice. 12 Memory Mapping I/O 0 I/O 7 (128K + 4K) bytes = (2K + 64) bytes = (2K + 64) bytes x 64 pages = (128K + 4K) bytes x 2,048 blocks = 2,112Mb I/O2 I/O1 CA2 ...

Page 13

... CA5 CA4 LOW LOW LOW BA6 PA5 PA4 BA14 BA13 BA12 LOW LOW LOW Micron Technology, Inc., reserves the right to change products or specifications without notice. 13 Memory Mapping I/O 0 I/O 15 (64K + 2K) words = (1K + 32) words = (1K + 32) words x 64 pages = (64K + 2K) words x 2,048 blocks = 2,112Mb I/O3 I/O2 I/O1 ...

Page 14

... CA3 LOW LOW CA11 PA5 PA4 PA3 BA13 BA12 BA11 LOW LOW LOW Micron Technology, Inc., reserves the right to change products or specifications without notice. 14 Memory Mapping I/O 0 I/O 7 (128K + 4K) bytes = (2K + 64) bytes = (2K + 64) bytes x 64 pages = (128K + 4K) bytes x 4,096 blocks = 4,224Mb I/O2 I/O1 CA2 ...

Page 15

... CA5 CA4 LOW LOW LOW BA6 PA5 PA4 BA14 BA13 BA12 LOW LOW LOW Micron Technology, Inc., reserves the right to change products or specifications without notice. 15 Memory Mapping I/O 0 I/O 15 (64K + 2K) words = (1K + 32) words = (1K + 32) words x 64 pages = (64K + 2K) words x 4,096 blocks = 4,224Mb I/O3 I/O2 I/O1 ...

Page 16

... Table 9 on page 20). PDF: 09005aef814b01a2 / Source: 09005aef814b01c7 2_4_8gb_nand_m49a__2.fm - Rev. D 12/06 EN 2Gb, 4Gb, 8Gb: x8, x16 NAND Flash Memory Micron Technology, Inc., reserves the right to change products or specifications without notice. 16 Bus Operation ©2005 Micron Technology, Inc. All rights reserved. ...

Page 17

... --------------------------------------------------------------- Rp MIN = Σ the sum of the input currents of all devices tied to the R/B# pin. L Micron Technology, Inc., reserves the right to change products or specifications without notice. 17 Bus Operation t R and transitions HIGH after the ) 1.85V ------------------------- - = Σ 3mA + IL ©2005 Micron Technology, Inc. All rights reserved. ...

Page 18

... Fall Rise - Rise are calculated at 10 percent and 90 percent points. t Fall ≈ 7ns at 1.8V. 18 Bus Operation Vcc 3.3 Vcc 1.8 Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2005 Micron Technology, Inc. All rights reserved. ...

Page 19

... Address input Data input Sequential read and data output During read (busy) During program (busy) During erase (busy) Write protect Standby Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2005 Micron Technology, Inc. All rights reserved. ...

Page 20

... Yes 85h 5 Optional 85h 2 Yes 60h 3 No FFh – No A0h 5 Yes A5h 5 No AFh 5 No Micron Technology, Inc., reserves the right to change products or specifications without notice. 20 Command Definitions Valid Command During 1 Cycle 2 Busy Notes 30h No – No – No 35h No E0h No – No – ...

Page 21

... Command Definitions t CLR OUT OUT 30h Busy Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2005 Micron Technology, Inc. All rights reserved rate (see t RHZ D OUT M Don’t Care ...

Page 22

... PAGE READ CACHE MODE Start 31h; PAGE READ CACHE MODE Start Last 3Fh Micron NAND Flash devices have a cache register that can be used to increase the READ operation speed when accessing sequential pages in a block. First, a normal PAGE READ (00h-30h) command sequence is issued. See Figure 16 on page 23 for operation details ...

Page 23

Figure 16: PAGE READ CACHE MODE CLE CE# WE# ALE t R R/B# RE# I/Ox 00h Address (5 cycles) 30h t DCBSYR1 t DCBSYR2 31h Data output 31h (Serial access) (Serial access) t DCBSYR2 Data output 3Fh Data output (Serial ...

Page 24

... PDF: 09005aef814b01a2 / Source: 09005aef814b01c7 2_4_8gb_nand_m49a__2.fm - Rev. D 12/06 EN 2Gb, 4Gb, 8Gb: x8, x16 NAND Flash Memory WHR t REA 00h Byte 0 Byte 1 24 Command Definitions Byte 2 Byte 3 Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2005 Micron Technology, Inc. All rights reserved. ...

Page 25

... Micron Technology, Inc., reserves the right to change products or specifications without notice. 25 Command Definitions 1 I/O2 I/O1 I/O0 Value Notes 2Ch DAh AAh CAh BAh ...

Page 26

... Ready/busy 2 cache Write protect Write protect – – t CLR t REA 70h Micron Technology, Inc., reserves the right to change products or specifications without notice. 26 Command Definitions t R (transfer from NAND Flash Block Erase Definition Pass/fail “0” = Successful PROGRAM/ERASE “1” = Error in PROGRAM/ERASE – ...

Page 27

... Address (2 cycles Command Definitions t PROG. The READ STATUS 70h Status I PROGRAM successful I PROGRAM error t PROG 10h 70h Status Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2005 Micron Technology, Inc. All rights reserved. ...

Page 28

... Address/ 80h 10h 2 output data input B: With status reads 28 Command Definitions t CBSY Address/ 15h 80h data input t LPROG 1 Status 70h 2 output Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2005 Micron Technology, Inc. All rights reserved. t LPROG 1 10h ...

Page 29

... PDF: 09005aef814b01a2 / Source: 09005aef814b01c7 2_4_8gb_nand_m49a__2.fm - Rev. D 12/06 EN 2Gb, 4Gb, 8Gb: x8, x16 NAND Flash Memory Command Definitions Micron Technology, Inc., reserves the right to change products or specifications without notice. 29 ©2005 Micron Technology, Inc. All rights reserved. ...

Page 30

... R Address 85h Data 85h (5 cycles) Unlimited number of repetitions 30 Command Definitions t PROG 10h 70h Status t PROG Address Data 10h 70h (2 cycles) Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2005 Micron Technology, Inc. All rights reserved. Status ...

Page 31

... I/Ox Address input (3 cycles) PDF: 09005aef814b01a2 / Source: 09005aef814b01c7 2_4_8gb_nand_m49a__2.fm - Rev. D 12/06 EN 2Gb, 4Gb, 8Gb: x8, x16 NAND Flash Memory t BERS D0h Micron Technology, Inc., reserves the right to change products or specifications without notice. 31 Command Definitions t BERS 70h Status I ERASE successful I ERASE error Don’ ...

Page 32

... OTP area any way they desire; typical uses include programming serial numbers or other data for permanent storage. In Micron NAND Flash devices, the OTP area leaves the factory in a non-written state (all bits are “1s”). Programming or partial-page programming enables the user to pro- gram only “ ...

Page 33

... IN 1 OTP page 00h bytes serial input x8 device 2,112 bytes x16 device 1,056 words Micron Technology, Inc., reserves the right to change products or specifications without notice. 33 Command Definitions PROG 10h 70h PROGRAM READ STATUS command command OTP data written (following " ...

Page 34

... PROGRAM command 34 Command Definitions t PROG. The READ STATUS (70h PROG 70h READ STATUS command OTP data protected 1 Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2005 Micron Technology, Inc. All rights reserved. Status Don’t Care ...

Page 35

... R) while the data is moved from the OTP page to the data register. The Col OTP 00h 00h 1 page 35 Command Definitions OUT OUT 30h Busy Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2005 Micron Technology, Inc. All rights reserved. D OUT M Don’t Care ...

Page 36

... WB t RST Bit 7 Bit 6 Bit Command Definitions Bit 4 Bit 3 Bit 2 Bit Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2005 Micron Technology, Inc. All rights reserved. Bit 0 Hex 0 E0h 0 60h ...

Page 37

... NAND Flash Memory t WW 60h D0h t WW 60h D0h t WW 80h 10h Micron Technology, Inc., reserves the right to change products or specifications without notice. 37 Command Definitions t WW) required from WP# toggling until a ©2005 Micron Technology, Inc. All rights reserved. ...

Page 38

... PROGRAM/ERASE cycles) when shipped from the factory. This pro- vides a reliable location for storing boot code and critical boot information. Before NAND Flash devices are shipped from Micron, they are erased. The factory iden- tifies invalid blocks before shipping by programming data other than FFh (x8) or FFFFh (x16) into the first spare location (column address 2,048 for x8 devices, or column address 1,024 for x16 devices) of the first or second page of each bad block ...

Page 39

... CC Ground supply voltage V Power Cycling CC Micron NAND Flash devices are designed to prevent data corruption during power tran- sitions. V device), or 2.0V (3V device), PROGRAM and ERASE functions are disabled. WP# provides additional hardware protection. WP# should be kept reaches approximately 1.5V (1.8V device) or 2.5V (3V device), a minimum of 10µs ...

Page 40

... OUT CC LO I/O[7:0], I/O[15:0] V – –400µ 2.1mA 0.4V I (R/B Micron Technology, Inc., reserves the right to change products or specifications without notice. 40 Electrical Characteristics Min Typ Max 1 – – – – – – – ...

Page 41

... OL Min Max Unit 2,008 2,048 Blocks 4,016 4,096 8,032 8,192 during the endurance life of the VB Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2005 Micron Technology, Inc. All rights reserved. Max Unit µA 100 µ ...

Page 42

... Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2005 Micron Technology, Inc. All rights reserved. Notes Notes Unit Notes ...

Page 43

... WB, even if R/B# is ready. Typ Max – 700 – – 300 700 Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2005 Micron Technology, Inc. All rights reserved. Unit Notes µs µ µ ...

Page 44

... ALS t ALH Col Col Row add 1 add 2 add 1 Micron Technology, Inc., reserves the right to change products or specifications without notice. 44 Timing Diagrams Don’t Care Row Row add 2 add 3 Don’t Care Undefined ©2005 Micron Technology, Inc. All rights reserved. ...

Page 45

... RC 45 Timing Diagrams t CLH Final CHZ t REA RHZ OUT Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2005 Micron Technology, Inc. All rights reserved. Don’t Care Don’t Care ...

Page 46

... Status output t CLR OUT OUT 30h Busy Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2005 Micron Technology, Inc. All rights reserved. Don’t Care t RHZ D OUT M Don’t Care ...

Page 47

... Data output Don’t Care t CLR t WHR Col Col OUT 05h E0h add 1 add 2 Column address M Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2005 Micron Technology, Inc. All rights reserved. t REA D D OUT OUT Don’t Care ...

Page 48

Figure 42: PAGE READ CACHE MODE Operation, Part CLE t CLH t CLS CE WE# ALE RE Col Col Row Row I/Ox 00h add 1 add 2 ...

Page 49

Figure 43: PAGE READ CACHE MODE Operation, Part CLE t CLS t CLH CE# WE# t CEA ALE REA D OUT ...

Page 50

Figure 44: PAGE READ CACHE MODE Operation without R/B#, Part CLE t CLS t CLH CE WE# ALE RE Col Col Row Row Row I/Ox 00h add ...

Page 51

Figure 45: PAGE READ CACHE MODE Operation without R/B#, Part CLE t CLS t CLH CE# WE# t CEA ALE REA D D I/Ox OUT ...

Page 52

... Timing Diagrams Byte 2 Byte PROG D IN 10h 70h M PROGRAM READ STATUS command command Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2005 Micron Technology, Inc. All rights reserved. Status Don’t Care ...

Page 53

... PROG Col 10h add 2 N N+1 Serial input PROGRAM command Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2005 Micron Technology, Inc. All rights reserved. 10h Don’t Care Status 70h READ STATUS command Don’t Care ...

Page 54

... IN IN 10h add 2 add 1 add 2 add PROGRAM Last Page Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2005 Micron Technology, Inc. All rights reserved. t WHR 70h Status READ STATUS command Don’t Care t WHR 70h Status Don’t Care ...

Page 55

Figure 52: PROGRAM PAGE CACHE MODE Operation Ending on 15h CLE CE ADL WE# ALE RE# Col Col Row Row Row I/Ox 80h N M add 1 add 2 add 1 add 2 add ...

Page 56

... WB t BERS Row D0h add 3 ERASE command Busy RST 56 Timing Diagrams t WHR Status 70h READ STATUS command I/ Pass I/ Fail Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2005 Micron Technology, Inc. All rights reserved. Don’t Care ...

Page 57

... Customer Comment Line: 800-932-4992 Micron, the M logo, and the Micron logo are trademarks of Micron Technology, Inc. All other trademarks are the property of This data sheet contains minimum and maximum limits specified over the complete power supply and temperature range for production devices ...

Page 58

... CHZ MAX value to 45ns (MAX) from 100ns to 150ns timings with R/B# unde- t WHR minimum value from 60ns to 80ns for 3V x16 Micron Technology, Inc., reserves the right to change products or specifications without notice. 58 Revision History ©2005 Micron Technology, Inc. All rights reserved. ...

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