MT9079 Mitel Semiconductor, MT9079 Datasheet - Page 43

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MT9079

Manufacturer Part Number
MT9079
Description
CMOS ST-BUS FAMILY Advanced Controller for E1
Manufacturer
Mitel Semiconductor
Datasheet

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Common Channel Signalling Interface
Figure 14 shows how to interface DSTi and DSTo
time slot 16 to the MC68302 for the control of
Common Channel Signalling (CCS) data. As can be
seen in the timing diagram, the MT8980D CSTo
signal must be programmed to go high during the bit
position just before time slot 16 (i.e., time slot 15, bit
0). This will enable the NMSI1 pins for one time slot
(eight C2 cycles) when the NMSI1 port is operated in
PCM mode. The STo stream of the MT8980D must
also be programmed to be high impedance during
time slot 16. C2 is used to clock data into and out of
the NMSI1 port.
It should be noted that the DS signal of the MC68302
must be inverted to interface to the MT8980D. Also,
DTACK must be connected to the MT8980D DTA and
pulled-up with a 909 ohms resistor.
Interface
To Line
Figure 15 - PCM-30 (E1) Trunk Cross-Connect using the MT9079 Transparent Mode
RxA
RxB
TxA
TxB
E2i
To Data Link
Controller
MT9079
C4i/C2i
DSTo
DSTi
RxMF
TxMF
DSTo
DSTi
MT9079
C4i/C2i
RxA
RxB
TxA
TxB
E2i
C4
Figure 16 - MT9079 Fibre Interface Circuit
C2
NRZ
NRZ
STi0
STo0
Switch 0,0
Switch n,0
MT8980D
MT8980D
Digital Cross-Connect Matrix
C4
Manchester Encoder
Manchester Decoder
CLKi
Datai
Data0
RxCLK
CODEi
m+1 Frame
Delay
Tx+
Tx-
The MT9079 Transparent Mode
Figure 15 illustrates an application in which the
MT9079 transparent mode can be used. That is, a
digital
complete PCM 30 trunks and does not require time
slot switching. It should be noted that any MT9079
devices that transport time slot switched data must
operate in termination mode otherwise, the CRC-4
remainder will be in error.
In transparent mode the complete PCM 30 data
stream will pass through the MT9079 except for the
data link (S
channel).
generated by the transmit section of the MT9079, but
the CRC-4 remainder bits received on DSTi will be
modified to reflect the new data link bits. This has the
advantage that any CRC-4 errors that occur on the
Transmit Fibre Interface
Receive Fibre Interface
Switch 0,M
Switch n,M
MT8980D
MT8980D
RxData
Tx+
Tx-
cross-connect
a4
The
of the NFAS - 4kbit/sec. maintenance
C4
CRC-4
Transmit Fibre
Receive Fibre
DSTo
DSTi
C4i/C2i
RxMF
TxMF
multiplexer
To Data Link
MT9079
remainder
Controller
E2i
TxA
TxB
RxA
RxB
that
MT9079
will
Interface
To Line
switches
not
4-279
be

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