MT9LSDT1672AG-133 Micron, MT9LSDT1672AG-133 Datasheet - Page 11

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MT9LSDT1672AG-133

Manufacturer Part Number
MT9LSDT1672AG-133
Description
128MB SDRAM UDIMM
Manufacturer
Micron
Datasheet
because unknown operation or incompatibility with
future versions may result.
Write Burst Mode
M2 applies to both READ and WRITE bursts; when M9
= 1, the programmed burst length applies to READ
bursts, but write accesses are single-location (non-
burst) accesses.
09005aef807b3709
SD9_18C16_32x72AG.fm - Rev. E 6/04 EN
Test modes and reserved states should not be used
When M9 = 0, the burst length programmed via M0-
128MB (x72, ECC, SR), 256MB (x72, ECC, DR)
11
Table 8:
SPEED
-13E
-133
-10E
Micron Technology, Inc., reserves the right to change products or specifications without notice.
CAS LATENCY = 2
168-PIN SDRAM UDIMM
CAS Latency Table
≤ 133
≤ 100
≤ 100
CLOCK FREQUENCY (MHz)
ALLOWABLE OPERATING
CAS LATENCY = 3
©2004 Micron Technology, Inc.
≤ 133
≤ 143
N/A

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