MT8985AP1 Zarlink Semiconductor, Inc., MT8985AP1 Datasheet - Page 14
MT8985AP1
Manufacturer Part Number
MT8985AP1
Description
256 x 256 Channels (8 TDM Streams at 2.048 Mbps) Non-blocking Enhance Digital Switch (EDX) with Constant Delay Mode
Manufacturer
Zarlink Semiconductor, Inc.
Datasheet
1.MT8985AP1.pdf
(26 pages)
MT8985
AC Electrical Characteristics
Voltages are with respect to ground (VSS) unless otherwise stated.
† Timing is over recommended temperature & power supply voltages (V
‡ Typical figures are at 25
2-58
10 Clock Rise/Fall Time
1 Frame Pulse width
2 Frame Pulse setup time
3 Frame Pulse hold time
4 STo delay Active to Active
5 STi setup time
6 STi hold time
7 Clock period
8 CK Input Low
9 CK Input High
C4i
STo
STi
F0i
2.0V
0.8V
2.0V
0.8V
2.0V
0.8V
2.0V
0.8V
Characteristics
Ch. 31
Bit 0
°
C and are for design aid only: not guaranteed and not subject to production testing.
Ch. 31
Bit 0
t
F0iS
†
t
t
DAA
F0iW
- ST-BUS Timing
t
F0iH
Figure 13 - ST-BUS Timing
Sym
t
t
t
t
t
t
t
F0iW
STiH
t
F0iS
F0iH
DAA
STiS
t
t
C4i
CH
CL
r,
t
f
t
Ch. 0
Bit 7
STiS
Min
200
10
20
20
20
85
85
Ch. 0
Bit 7
DD
=5V
Typ
244
244
122
122
45
±
t
STiH
‡
5%, V
t
C4i
Max
SS
190
190
100
300
150
150
10
=0V, T
A
=–40 to 85
t
Units
CH
t
f
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Ch. 0
Bit 6
°
C
t
CL
C).
L
=150 pF
Ch. 0
Bit 6
Test Conditions
t
r
Ch. 0
Bit 5
Ch. 0
Bit 5