MT9080BPR Zarlink Semiconductor, Inc., MT9080BPR Datasheet
MT9080BPR
Related parts for MT9080BPR
MT9080BPR Summary of contents
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Features • 16 bit wide data bus I/O • 16 bit address bus • Microprocessor Interface • 2048 x 16 bit wide memory SRAM • Interfaces with Zarlink’s MT9085B to form larger switch mitoses • Variable clock and frame rates ...
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MT9080B CMOS D8i 12 D9i D10i 14 D11i VSS 16 D12i D13i 18 D14i 20 D15i VSS CK 22 VDD 24 VSS R/W 30 DTA NC 32 Pin Description Pin # Name 1 ...
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Pin Description Pin # Name 28 CS Chip Select. Active Low input. Selects the device for microport access in connect memory, data memory, external and shift register modes. Tying CS high will disable output data drivers (D0-D15o) in all modes ...
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MT9080B CMOS Pin Description Pin # Name 46-61 A0-A15 Address Bus. These inputs have three different functions. Inputs A0-A10 are used to address internal memory locations during read or write operations in all modes except Shift Register mode. In Shift ...
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Functional Description The SMX is a flexible memory module suitable for use in the construction of timeslot interchange circuits used in PCM voice or data switches. The device can be configured as a data memory or a connection memory. The ...
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MT9080B CMOS ➀ CK External CH X Address Bus A0-A15 Data Output D0-D15o FP Address generated by 1022 Internal 11 Bit Counter Data Input D0-D15i Data is clocked out of the memory location addressed by external address bus. The address ...
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This mode provides minimum delay through the SMX for any switching configuration. Data Memory Mode-2 Data Memory Mode-2 is designed for use in constructing a 1024 by 1024 channel double buffered switch. This mode is similar in most respects to ...
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MT9080B CMOS CK 16 D0-D15 A0-A15 CS DS R/W DTA 0/1 Figure 7 - Connect Memory Modes Pinout Data is clocked out on D0 -D15 o locations addressed sequentially by the internal counter. This counter is incremented ...
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The device can perform either a read or a write, depending on the level asserted at the R/W pin. When R/W is high, the contents of the memory addressed by the internal counter will be clocked out on to the ...
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MT9080B CMOS CK FP Data Data Out Figure 14 - Shift Register Mode Data Input/Output Timing Applications 1024 Channel Switch Matrix A 1024 channel, non-blocking, timeslot interchange switch can be constructed using two SMX devices ...
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The delay through the matrix can be optimized for specific applications by selectively enabling one of the two modes. Data Memory-1 (DM-1) is designed for voice switching applications where it is generally desirable to minimize delay through the switch. ...
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MT9080B CMOS CK CONNECTION MEMORY TIMING FP #2 Internal Counter 1023 0 (Read Address) addresses Data Output 1022 1023 D0o-D15o DATA MEMORY TIMING Data Output 1021 D0o-D15o FP #1 Internal Counter (Write Address) Data In 1021 D0i-D15i Note 1: Address ...
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Switching any input channel to an output channel timeslot is possible by merely writing the address of the input channel in the Connection Memory location corresponding to the output channel timeslot. For example, to switch channel 1 to output channel ...
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MT9080B CMOS CK DFP (SMX #1) DFP (SMX #2) Written to SMX #2 Data In 2045 2046 2047 (SMX1/2) CFP (SMX #3) SMX #3 2046 2047 0 Int. Counter SMX #3 2045 2046 2047 D0o-D10o Read from SMX #1 Data ...
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The SMX in the external mode reads data out from memory locations addressed by the Connection memory. In this manner, incoming data is continually written into one memory block while it is ...
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MT9080B CMOS Parallel-to-Serial Conversion The SMX can be used in systems which employ serial architectures by converting the parallel I/O into a serial format. The Zarlink MT9085 Parallel Access Circuit (PAC) is designed to interface to the parallel busses of ...
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Absolute Maximum Ratings* Parameter 1 Supply Voltage All Input Voltages 3 All Output Voltages 4 Storage Temperature Range 5 Current at Digital Outputs 6 Continuous Power Dissipation * Exceeding these values may cause permanent damage. ...
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MT9080B CMOS AC Electrical Characteristics . to Ground (V ) unless otherwise stated SS Characteristics 1 ODE Setup 2 ODE Hold 3 Data Output High Z to Active 4 Data Output Active to High Z † Timing is over recommended ...
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AC Electrical Characteristics Mode Timing (See Fig. 25) - Characteristics 1 Address Setup 2 Address Hold 3 Data Output Delay 4 Data Input Setup 5 Data Input Hold 6 ME, Mx, My, Mz Setup 7 ME, Mx, My, Mz Hold ...
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MT9080B CMOS CK A0-A15*, R/W** t WES ME/Mx/y/z t MES D0i-D15i D0o-D15o * Timing applicable to External mode only. ** Timing applicable to External and Counter modes. Figure 26 - External, Connect Memory-2 and Counter Mode Timing AC ...
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AC Electrical Characteristics Memory & External Modes (See Fig. 28) - Characteristics 1 Chip Select Setup 2 Chip Select Hold 3 ADDR 4 R/W Setup 5 ADDR, R/W Hold 6 DTA Delay 7 DTA Hold 8 Valid Data Out to ...
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MT9080B CMOS AC Electrical Characteristics (See Fig. 29) - Voltages are with respect to Ground (V Characteristics 1 Chip Select Setup 2 Chip Select Hold 3 ADDR, R/W Setup 4 ADDR, R/W Hold 5 DTA Delay 6 DTA Hold 7 ...
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AC Electrical Characteristics 30) - Voltages are with respect to Ground (V Characteristics 1 Frame Pulse Setup 2 Frame Pulse Hold 3 Change Detect Delay 4 Change Detect Reset Delay † Timing is over recommended temperature and power supply voltages. ...
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For more information about all Zarlink products Information relating to products and services furnished herein by Zarlink Semiconductor Inc. trading as Zarlink Semiconductor or its subsidiaries (collectively “Zarlink”) is believed to be reliable. However, Zarlink assumes no liability for errors ...