CS4812 Cirrus Logic, CS4812 Datasheet - Page 12

• Manufacturer Part Number: CS4812
• Description: Fixed Function Multi-Effects Audio Processor
• Manufacturer: Cirrus Logic

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SWITCHING CHARACTERISTICS - CONTROL PORT - I
VA, VD = 5V; Inputs: logic 0 = DGND, logic 1 = VD, C
Notes: 21. Use of the I
12
I
SCL Clock Frequency
Clock Low Time
Clock High Time
Bus Free Time Between Transmissions
RST rising to start condition
Start Condition Hold Time
Setup Time for Repeated Start Condition
SDA Setup Time to SCL Rising
SDA Hold Time from SCL Falling
SCL falling to SDA Output Valid
SCL and SDA Rise Time
SCL and SDA Fall Time
Setup Time for Stop Condition
2
C
®
Master (AutoBoot) Mode (SPI/I2C = 1, SCPM/S = 1) (Note 21)
(output)
22. Depending on the input clock configuration, CCLK may be up to 2*Fs temporarily during AutoBoot after
23. Data must be held for sufficient time to bridge the worst case fall time of 300 ns for CCLK/SCL.
24. For both SDA transmitting and receiving.
RST
SDA
SCL
Semiconductors.
RST has been de-asserted and before the control port registers have been initialized.
Stop
t irs
t buf
Parameter
2
C bus interface requires a license from Philips. I
Start
Figure 4. I
t hdst
t
low
t
cldv
2
C
t
®
hdd
Control Port Master Mode (AutoBoot) Timing
(Note 22)
(Note 23)
(Note 24)
(Note 24)
t high
L
= 30 pF)
Symbol
t
t
t
t
t
t
t
t
susp
t sud
t
f
high
hdst
sust
cldv
t
sud
hdd
low
buf
scl
irs
t
t
r
f
Repeated
t sust
Start
13.5
Min
250
4.7
4.0
4.7
2
0
-
-
-
-
-
-
-
C is a registered trademark of Philips
t
hdst
2
t r
C
1/(2*Fs)
1/(2*Fs)
®
Typ
Fs
22
-
-
-
-
-
-
-
-
-
MASTER
t f
Max
300
1.5
Stop
1
-
-
-
-
-
-
-
-
-
-
t susp
CS4812
(T
DS291PP3
A
= 25°C;
Units
kHz
µs
µs
µs
µs
µs
µs
ns
µs
µs
µs
ns
µs