CS8415A Cirrus Logic, CS8415A Datasheet - Page 6

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CS8415A

Manufacturer Part Number
CS8415A
Description
96 kHz DIGITAL AUDIO INTERFACE RECEIVER
Manufacturer
Cirrus Logic
Datasheet

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SWITCHING CHARACTERISTICS - SERIAL AUDIO PORTS
(T
Logic 0 = 0 V, Logic 1 = VL+; C
Notes: 5. The active edges of OSCLK are programmable.
6
OSCLK Active Edge to SDOUT Output Valid
Master Mode
RMCK to OSCLK active edge delay
RMCK to OLRCK delay
OSCLK and OLRCK Duty Cycle
Slave Mode
OSCLK Period
OSCLK Input Low Width
OSCLK Input High Width
OSCLK Active Edge to OLRCK Edge
OLRCK Edge Setup Before OSCLK Active Edge (Note 5,6,9)
A
= 25 °C for suffixes ‘CS’ &’CZ’, T
(output)
OSCLK
Figure 1. Audio Port Master Mode Timing
OLRCK
(output)
RMCK
(input)
6. The polarity OLRCK is programmable.
7. No more than 128 SCLK per frame.
8. This delay is to prevent the previous OSCLK edge from being interpreted as the first one after OLRCK
9. This setup time ensures that this OSCLK edge is interpreted as the first one after OLRCK has changed.
has changed.
t smd
Parameter
L
= 20 pF)
t
lmd
A
= -40 to 85°C for ‘IS’ & ‘IZ’ ; VA+ = 5V±10%, VL+ = 3/5V ±5/10% , Inputs:
(Note 5,6,8)
(Note 5)
(Note 5)
(Note 6)
(Note 7)
Figure 2. Audio Port Slave Mode and Data Input Timing
OSCLK
OLRCK
(input)
SDOUT
(input)
Symbol
t
t
t
t
t
t
t
t
sckw
sckh
lrckd
lrcks
smd
sckl
dpd
lmd
t
lrckd
Min
36
14
14
20
20
0
0
t
-
-
lrcks
Typ
50
-
-
-
-
-
-
-
-
t
sckh
t
Max
sckw
20
10
10
t
-
-
-
-
-
-
CS8415A
sckl
t dpd
DS470PP3
Units
ns
ns
ns
ns
ns
ns
ns
ns
%

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