LTC3589 Linear Technology, LTC3589 Datasheet - Page 31

• Manufacturer Part Number: LTC3589
• Description: 8-Output Regulator
• Manufacturer: Linear Technology

PGOOD
OPERATION
Figure 14 shows the PGOOD pin and PGSTAT status reg-
ister timing. When no regulator is enabled, the PGOOD
pin is pulled LOW and PGSTAT bits are LOW. PGOOD and
the PGSTAT bits are HIGH 250μs after the last enabled
regulator is within 7% of its target.
If any enabled regulator output falls more than 8% low for
longer than 25μs PGOOD is pulled LOW and a status bit is
set in the PGSTAT register. The PGOOD pin and PGSTAT
status bit remain LOW for as long as the low voltage
condition persists plus 250μs.
An extended low output rail causing the PGOOD pin to
be LOW for longer than 14ms defi nes a PGOOD timeout
fault condition that triggers a hard reset if not masked in
I
During a dynamic voltage slew, PGOOD is pulled LOW
unless bit 5 in the dynamic target voltage register for each
regulator is set HIGH. When SCR2[7] is HIGH, PGOOD
remains in normal operation. The status register PGSTAT
is unaffected by a dynamic voltage slew.
Undervoltage Detection
The LTC3589 under voltage (UV) detection circuit will
output a fault condition, locking out regulator operation,
until V
fault threshold the LTC3589 will operate normally until V
drops to 2.6V (typical). When V
WAKE
V
2
OUTx
ENx
C register bit SCR2[7].
IRQ
Figure 14. PGOOD Pin and PGSTAT Status Register Timing
250μs
IN
ENABLE
reaches 2.7V (typical). Once V
200μs
UNDERVOLTAGE
25μs
250μs
25μs
UNDERVOLTAGE
IN
EXTENDED
(FAULT)
drops below 2.6V, the
14ms
1sec
IN
250μs
WAKE HIGH AFTER 1sec
is above the
IF PWR_ON HIGH
DISABLED IF
WAKE LOW
DISABLE
3589 F14
IN
An undervoltage warning sets register bit IRQSTAT[4] and
pulls the IRQ pin LOW.
To minimize standby quiescent current the UVLO and
thermal sensor circuits are disabled when all the regula-
tors are off.
Thermal Shutdown Fault and Warning
Similar to the V
temperature detection circuits check for warning and fault
levels. An over temperature fault will initiate a fault induced
shutdown. An over temperature warning sets register bit
IRQSTAT[6] and pulls the IRQ pin LOW.
IRQ Pin and IRQSTAT Status Register Function
The IRQ pin and IRQSTAT status register report PGOOD
timeout fault, V
high temperature warning and fault. Table 15 shows the
meaning of the IRQSTAT read only status register bits.
Table 15. IRQSTAT Read Only Register Bit Defi nitions
fault condition initiates a hard shutdown reset. Figure 15
shows undervoltage warning and fault detection levels.
IRQSTAT[BIT]
Figure 15. UV Detection Hard Reset and Warning Levels
UNDERVOLTAGE
3
4
5
6
7
V
VALUE
IN
IN
IN
1
1
1
1
1
undervoltage detection circuits the over
undervoltage warning and fault, and
2.55V
SETTING
PGOOD Timeout Fault (PGOOD low >
14ms)
V
V
Thermal Limit Warning (T
Thermal Limit Fault (T
IN
IN
FAULT
Under Voltage Warning (V
Under Voltage Fault (V
2.65V
2.9V
WARNING
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J
LTC3589
> 150°C)
3V
J
IN
> 130°C)
< 2.6V)
IN
3589 F15
< 2.9V)
V
IN
31
3589p