LTC6603 Linear Technology, LTC6603 Datasheet - Page 16

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LTC6603

Manufacturer Part Number
LTC6603
Description
Dual Adjustable Lowpass Filter
Manufacturer
Linear Technology
Datasheet

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APPLICATIONS INFORMATION
LTC6603
The following graphs show a few of the possible lowpass
fi lters.
The oscillator is sensitive to transients on the positive
supply. The IC should be soldered to the PC board and
the PCB layout should include a 0.1μF ceramic capacitor
between V+
the IC to minimize inductance. The PCB layout should also
include an additional 0.1μF ceramic capacitor between
V+
R
Use a ground plane connected to Pin 14 and the Exposed
Pad (Pin 25).
16
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D
(Pin 16) and ground. Avoid parasitic capacitance on
(Pin 4) and avoid routing noisy signals near R
–100
–120
–20
–40
–60
–80
–20
–40
–60
–80
A
0
100k
0
100k
Gain and Group Delay vs Frequency
Gain and Group Delay vs Frequency
(Pin 2) and ground, as close as possible to
GROUP DELAY
(2.5MHz Lowpass Response)
(650kHz Lowpass Response)
GROUP DELAY
GAIN
GAIN
FREQUENCY (Hz)
FREQUENCY (Hz)
1M
1M
10M
6603 G18
6603 G17
1
4
3
2
0
1.2
1.0
0.8
0.6
0.4
0.2
0
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.
Alternative Methods of Setting the Clock Frequency of
the LTC6603
The oscillator may be programmed by any method that
sinks a current out of the R
sets the clock frequency by using a programmable current
source and in the expression for f
is replaced by the ratio of 1.17V/I
voltage of the R
Figure 6 circuit is less accurate than if a resistor controls
the clock frequency.
In this circuit, the LTC2621 (a 12-bit DAC) is daisy chained
with the LTC6603. Because the sinking current from the
R
the equivalent R
where k is the binary DAC input code and N is the resolu-
tion. Figure 7 shows some of the frequency responses
that can be obtained using this circuit.
Figure 8 shows the LTC6603’s oscillator confi gured as
a VCO. A voltage source is connected in series with the
R
V
between the current out of the R
of the R
The clock frequency, however, will increase monotonically
with decreasing V
Operation Using an External Clock
The LTC6603 may be clocked by an external oscillator
for tighter bandwidth control by pulling CLKCNTL (Pin 5)
to ground and driving a clock into CLKIO (Pin 15). If an
external clock is used, the R
The value of R
would be required for using the internal oscillator. For
example, a 100k resistor would program the internal oscil-
lator for 24.705MHz, so an external oscillator frequency of
24.705MHz would require an R
CONTROL
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2
V
N
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2
N
k
pin is
• R1
resistor. The clock frequency, f
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• R1
. Again, this circuit decouples the relationship
• k
,
pin; the frequency accuracy will be degraded.
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CONTROL
must be no larger than the value that
pin is approximately 1.17V ±5%, the
is
.
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pin. The circuit in Figure 6
resistor is still necessary.
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CLK
CONTROL
resistance of no more
pin and the voltage
, the resistor R
CLK
, will vary with
. Because the
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6603f

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