LTC6603 Linear Technology, LTC6603 Datasheet - Page 18

• Manufacturer Part Number: LTC6603
• Description: Dual Adjustable Lowpass Filter
• Manufacturer: Linear Technology

APPLICATIONS INFORMATION
LTC6603
than 100k. If the value of R
not receive a large enough bias current, possibly causing
errors due to insuffi cient settling. Be sure to obey the
absolute maximum specifi cations when driving a clock
into CLKIO (Pin 15).
Input Common Mode and Differential Voltage Range
The input signal range extends from zero to the V+
supply voltage. This input supply can be tied to V+
V+
Figure 9 shows the distortion of the fi lter versus common
mode input voltage with a 2V
(V+
For best performance, the inputs should be driven dif-
ferentially. For single ended signals, connect the unused
input to V
To achieve the best distortion performance, the input
signal should be centered around the DC voltage of the
unused input.
Refer to the Typical Performance Characteristics section
to estimate the distortion for a given input level.
Dynamic Input Impedance
The unique input sampling structure of the LTC6603
has a dynamic input impedance which depends on the
confi guration and the clock frequency. This dynamic
input impedance has both a differential component and
a common mode component. The common mode input
impedance is a function of the clock frequency and the
18
D
IN
Figure 9. Distortion vs Common Mode Input Voltage (5V)
, or driven up to 5.5V for increased input signal range.
= 5V).
OCM
–60
–70
–80
–90
1.0
R
LPF1 = 1, BW = 2.5MHz, GAIN = 24dB
V
(Pin 3) or to a quiet DC reference voltage.
BIAS
OUT
1.5
COMMON MODE INPUT VOLTAGE (V)
= V
= 30.9k, V
HD3, f = 1MHz
HD3, f = 200kHz
P-P
2.0
, T
A
2.5
S
= 25°C
= 3V, V+
BIAS
3.0
P-P
IN
is too large, the fi lters will
3.5
= 5.5V
differential input signal
4.0
4.5
6603 F09
5.0
A
and
IN
control bits LPF1 and LPF0. The differential input imped-
ance is a function of the clock frequency and the control
bits LPF1, LPF0, GAIN1 and GAIN0. Table 5 shows the
typical input impedances for a clock frequency of 80MHz.
These input impedances are all proportional to 1/f
if the clock frequency were reduced by half to 40MHz,
the impedances would be doubled. The typical variation
in dynamic input impedance for a given clock frequency
is –20% to +35%.
Table 5. Differential, Common Mode Input Impedances,
f
Output Common Mode and Differential Voltage Range
The output voltage is a fully differential signal with a
common mode level equal to the voltage at V
the fi lter outputs may be used as single-ended outputs,
although this will degrade the performance. The output
voltage range is typically 0.5V to V+
to 3.6V).
The common mode output voltage can be adjusted by
overdriving the voltage present on V
the undistorted peak-to-peak signal swing of the fi lter,
the V
output common mode voltages of the two channels are
CLK
GAIN1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
= 80MHz
OCM
GAIN0
voltage should be set to V+
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
LPF1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
LPF0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Input Impedance
Differential
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(kΩ)
2.5
2.5
9.5
2.5
2.5
5.4
1.9
1.9
5.2
2.8
1.6
1.6
38
16
20
10
A
– 0.5V (V+
OCM
A
/2. Note that the
. To maximize
Input Impedance
Common Mode
OCM
(kΩ)
40
20
40
20
40
20
40
20
A
5
5
5
5
5
5
5
5
. Any of
CLK
= 2.7V
, so
6603f