LTC690 Linear Technology, LTC690 Datasheet - Page 11

• Manufacturer Part Number: LTC690
• Description: Microprocessor Supervisory Circuits
• Manufacturer: Linear Technology

A
V
+
IN
V
PPLICATI
5V
5V
IN
0.1 F
0.1 F
Figure 6. A Typical Nonvolatile CMOS RAM Application
Figure 7. Write Protect for RAM with LTC690 or LTC694
10 F
R1
51k
R2
10k
6.5V
10 F
3V
3V
7.5V
+
Figure 8. Monitoring Unregulated DC Supply
with the LTC690's Power-Fail Comparator
V
LT1086-5
IN
Figure 9. Monitoring Regulated DC Supply
with the LTC690's Power-Fail Comparator
ADJ
V
V
V
V
V
V
BATT
CC
GND
BATT
CC
LT1086-5
IN
OUT
LTC691
LTC695
LTC690
LTC694
ADJ
GND
O
V
CE OUT
RESET
RESET
+
RESET
OUT
CE IN
V
V
U
OUT
OUT
10 F
S
+
+
+
I FOR ATIO
100 F
U
R1
27k
R2
8.2k
R5
3.3k
20ns PROPAGATION DELAY
300k
TO P
R3
10 F
FROM DECODER
10 F
2.7M
5V
R3
10k
R4
R4
10k
0.1 F
5V
W
0.1 F
0.1 F
0.1 F
CS
TO P
TO P
PFI
PFO
LTC690/LTC691
LTC694/LTC695
V
PFO
PFI
V
LTC690/LTC691
LTC694/LTC695
CC
CC
CS
V
CS1
CS2
V
U
GND
CC
62512
CC
RAM
GND
GND
GND
62128
RAM
690 F06
690 F07
690 F08
1690 F09
Power-Fail Warning
The LTC690 family generates a Power Failure Output
(PFO) for early warning of failure in the microprocessor's
power supply. This is accomplished by comparing the
Power Failure Input (PFI) with an internal 1.3V reference.
PFO goes low when the voltage at the PFI pin is less than
1.3V. Typically PFI is driven by an external voltage divider
(R1 and R2 in Figures 8 and 9) which senses either an
unregulated DC input or a regulated 5V output. The voltage
divider ratio can be chosen such that the voltage at the PFI
pin falls below 1.3V several milliseconds before the 5V
supply falls below the maximum reset voltage threshold
4.75V. PFO is normally used to interrupt the microproces-
sor to execute shutdown procedure between PFO and
RESET or RESET.
The power-fail comparator, C3, does not have hysteresis.
Hysteresis can be added however, by connecting a resis-
tor between the PFO output and the noninverting PFI input
pin as shown in Figures 8 and 9. The upper and lower trip
points in the comparator are established as follows:
When PFO output is low, R3 sinks current from the
summing junction at the PFI pin.
When PFO output is high, the series combination of R3 and
R4 source current into the PFI summing junction.
Example 1: The circuit in Figure 8 demonstrates the use of
the power-fail comparator to monitor the unregulated
power supply input. Assuming the the rate of decay of the
supply input V
a shutdown procedure is 8ms. Also the noise of V
200mV. With these assumptions in mind, we can reason-
ably set V
maximum reset voltage threshold and the dropout voltage
V = 1.3V 1+
V
Assuming R4
H
L
1.3V 1
L
= 7.5V which 1.25V greater than the sum of
IN
is 100mV/ms and the total time to execute
R2
R1
R2
R1
–
R3,V
R3
1.3V(R3 R4)
R1
(5V – 1.3V)R1
HYSTERESIS
LTC694/LTC695
LTC690/LTC691
5V
R3
R1
11
IN
is