MBM29F017A Fujitsu Media Devices, MBM29F017A Datasheet

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MBM29F017A

Manufacturer Part Number
MBM29F017A
Description
16M (2M X 8) BIT
Manufacturer
Fujitsu Media Devices
Datasheet

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Part Number:
MBM29F017A-90PFTN
Manufacturer:
FUJI
Quantity:
137
FUJITSU SEMICONDUCTOR
FLASH MEMORY
CMOS
16M (2M
MBM29F017A
Embedded Erase™, Embedded Program™ and ExpressFlash™ are trademarks of Advanced Micro Devices, Inc.
FEATURES
• Single 5.0 V read, write, and erase
• Compatible with JEDEC-standard commands
• 48-pin TSOP, 40-pin SON
• Minimum 100,000 write/erase cycles
• High performance
• Sector erase architecture
• Embedded Erase
• Embedded Program
• Data Polling and Toggle Bit feature for detection of program or erase cycle completion
• Ready/BUSY output (RY/BY)
• Low V
• Hardware RESET pin
• Erase Suspend/Resume
• Sector group protection
• Temporary sector groups unprotection
DATA SHEET
Minimizes system level power requirements
Pinout and software compatible with single-power supply Flash
Superior inadvertent write protection
70 ns maximum access time
Uniform sectors of 64K bytes each
Any combination of sectors can be erased. Also supports full chip erase
Automatically pre-programs and erases the chip or any sector
Automatically programs and verifies data at specified address
Hardware method for detection of program or erase cycle completion
Resets internal state machine to the read mode
Supports reading or programming data to a sector not being erased
Hardware method that disables any combination of sector groups from write or erase operation (a sector group
consists of 4 adjacent sectors of 64K bytes each)
Hardware method temporarily enable any combination of sectors from write or erase operations
CC
write inhibit
TM
Algorithms
TM
Algorithms
3.2 V
-70/-90/-12
8) BIT
DS05-20843-3E

Related parts for MBM29F017A

MBM29F017A Summary of contents

Page 1

... FUJITSU SEMICONDUCTOR DATA SHEET FLASH MEMORY CMOS 16M (2M MBM29F017A FEATURES • Single 5.0 V read, write, and erase Minimizes system level power requirements • Compatible with JEDEC-standard commands Pinout and software compatible with single-power supply Flash Superior inadvertent write protection • 48-pin TSOP, 40-pin SON • ...

Page 2

... MBM29F017A -70/-90/-12 PACKAGE Marking Side FPT-48P-M19 2 48-pin Plastic TSOP (I) Marking Side FPT-48P-M20 40-pin Plastic SON LCC-40P-M02 ...

Page 3

... GENERAL DESCRIPTION The MBM29F017A is a 16M-bit, 5.0 V-Only Flash memory organized as 2M bytes of 8 bits each. The 2M bytes of data is divided into 32 sectors of 64K bytes for flexible erase capability. The 8 bit of data will appear The MBM29F017A is offered in a 48-pin TSOP package. This device is designed to be programmed in- 7 system with the standard system 5 ...

Page 4

... MBM29F017A -70/-90/-12 FLEXIBLE SECTOR-ERASE ARCHITECTURE • Thirty two 64K byte sectors • 8 sector groups each of which consists of 4 adjacent sectors in the following pattern; sectors 0-3, 4-7, 8-11, 12-15, 16-19, 20-23, 24-27, and 28-31 • Individual-sector or multiple-sector erase capability • Sector group protection is user-definable SA31 SA30 SA29 SA28 SA3 SA2 SA1 ...

Page 5

... Max. OE Access Time (ns) BLOCK DIAGRAM RY/BY Buffer State Control RESET Command Register CE OE Low V Detector MBM29F017A MBM29F017A -70 — - RY/BY Erase Voltage Generator Program Voltage Generator Chip Enable Output Enable Logic Y-Decoder STB Timer for Address Program/Erase Latch ...

Page 6

... Side MBM29F017A 37 Standard Pinout FPT-48P-M19 25 26 (Marking Side MBM29F017A 36 Reverse Pinout FPT-48P-M20 N. RY/ ...

Page 7

... RY/ N.C. MBM29F017A (TOP VIEW) (Marking side MBM29F017A SON- LCC-40P-M02 -70/-90/- RESET ...

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... WE can Table 1 MBM29F017A Pin Configuration Pin RY/BY Hardware Reset Pin/Sector Protection RESET N. MBM29F017A User Bus Operations ...

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... MBM29F017 A -70 DEVICE NUMBER/DESCRIPTION MBM29F017 16 Mega-bit (2M 5.0 V-only Read, Write, and Erase 64K Bytes (32 Sectors) MBM29F017A PFTN PACKAGE TYPE PFTN = 48-Pin Thin Small Outline Package (TSOP) Standard Pinout PFTR = 48-Pin Thin Small Outline Package (TSOP) Reverse Pinout PNS = 40-Pin Small Outline Nonleaded ...

Page 10

... Table 6. (Refer to Autoselect Command section.) Byte represents the manufacturer's code (Fujitsu = 04H) and byte code for MBM29F017A = ADH. These two bytes are given in the table 3. All identifiers for manufacturer and device will exhibit odd parity with DQ executing the Autoselect, A must time ...

Page 11

... XX02H with the higher order address bits A desired sector group address, the device will return 01H for a protected sector group and 00H for a non-protected sector group. Table 3 MBM29F017A Sector Protection Verify Autoselect Codes Type Manufacture’ ...

Page 12

... MBM29F017A -70/-90/- SA0 0 SA1 0 SA2 0 SA3 0 SA4 0 SA5 0 SA6 0 SA7 0 SA8 0 SA9 0 SA10 0 SA11 0 SA12 0 SA13 0 SA14 0 SA15 0 SA16 1 SA17 1 SA18 1 SA19 1 SA20 1 SA21 1 SA22 1 SA23 1 SA24 1 SA25 1 SA26 1 SA27 1 SA28 1 SA29 1 SA30 1 SA31 1 12 Table 4 Sector Address Table ...

Page 13

... Refer to AC Write Characteristics and the Erase/Programming Waveforms for specific timing parameters. Sector Group Protection The MBM29F017A features hardware sector group protection. This feature will disable both program and erase operations in any combination of eight sector groups of memory. Each sector group consists of four adjacent sectors grouped in the following pattern: sectors 0-3, 4-7, 8-11, 12-15, 16-19, 20-23, 24-27, and 28-31 (see Table 5) ...

Page 14

... Temporary Sector Group Unprotection This feature allows temporary unprotection of previously protected sector groups of the MBM29F017A device in order to change data. The Sector Group Unprotection mode is activated by setting the RESET pin to high voltage (12 V). During this mode, formerly protected sector groups can be programmed or erased by selecting the sector group addresses ...

Page 15

... Only erase operations can convert “0”s to “1”s. Figure 15 illustrates the Embedded Programming Algorithm using typical command strings and bus operations. MBM29F017A to a high voltage. However, multiplexing high 9 defined as the parity bit ...

Page 16

... MBM29F017A -70/-90/-12 Chip Erase Chip erase is a six bus cycle operation. There are two “unlock” write cycles. These are followed by writing the “set-up” command. Two more “unlock” write cycles are then followed by the chip erase command. Chip erase does not require the user to program the device prior to erase. Upon executing the Embedded Erase Algorithm command sequence the device will automatically program and verify the entire memory for an all zero data pattern prior to electrical erase ...

Page 17

... To resume the operation of Sector Erase, the Resume command (30H) should be written. Any further writes of the Resume command at this point will be ignored. Another Erase Suspend command can be written after the chip has resumed erasing. MBM29F017A TM Algorithm. Writting the Erase Suspend will stop toggling. The user must use the address of the 6 to determine if the erase operation has been suspended ...

Page 18

... DQ 7 Data Polling The MBM29F017A device features Data Polling as a method to indicate to the host that the embedded algorithms are in progress or completed. During the Embedded Program produce the complement of the data last written attempt to read the device will produce the true data last written to DQ Algorithm, an attempt to read the device will produce a “ ...

Page 19

... DQ 6 Toggle Bit I The MBM29F017A also features the “Toggle Bit I” method to indicate to the host system that the embedded algorithms are in progress or completed. During an Embedded Program or Erase Algorithm cycle, successive attempts to read (OE toggling) data from the device at any address will result in DQ Erase Algorithm cycle is completed, DQ attempts ...

Page 20

... RY/BY Ready/Busy The MBM29F017A provides a RY/BY open-drain output pin as a way to indicate to the host system that the Embedded Algorithms are either in progress or has been completed. If the output is low, the device is busy with either a program or erase operation. If the output is high, the device is ready to accept any read/write or erase operation ...

Page 21

... Flash memory. Data Protection The MBM29F017A is designed to offer protection against accidental erasure or programming caused by spurious system level signals that may exist during power transitions. During power up the device automatically resets the internal state machine in the Read mode. Also, with its control register architecture, alteration of the memory contents only occurs after successful completions of specific multi-bus cycle command sequences ...

Page 22

... Supply Voltages CC MBM29F017A-70....................................................................................... +4. +5.25 V MBM29F017A-90/-12................................................................................. +4. +5.50 V Operating ranges define those limits between which the functionality of the device is guaranteed. WARNING: The recommended operating conditions are requird in order to ensure the normal operation of the semiconductor device. All of the device’s electrical characteristics are warranted when the device is operated within these ranges ...

Page 23

... V Figure +2.0 V Figure 2 +14.0 V +13 +0 Note : This waveform is applied for A , OE, and RESET. 9 Figure 3 MBM29F017A Maximum Negative Overshoot Waveform Maximum Positive Overshoot Waveform Maximum Positive Overshoot Waveform -70/-90/-12 23 ...

Page 24

... MBM29F017A -70/-90/-12 DC CHARACTERISTICS Parameter Parameter Description Symbol I Input Leakage Current LI I Output Leakage Current OE, RESET Inputs Leakage 9 I LIT Current I V Active Current (Note 1) CC1 Active Current (Note 2) CC2 Current (Standby) CC3 Current (Standby, Reset) CC4 CC V Input Low Level ...

Page 25

... Input rise and fall times Input pulse levels: 0 3.0 V Timing measurement reference level Input: 1.5 V Output: 1.5 V Device Under Test Note including jig capacitance 100 pF including jig capacitance L MBM29F017A Test Setup — Min Max Max. IL — Max. ...

Page 26

... MBM29F017A -70/-90/-12 • Write (Erase/Program) Operations Parameter Symbols JEDEC Standard t t Write Cycle Time AVAV Address Setup Time AVWL Address Hold Time WLAX Data Setup Time DVWH Data Hold Time WHDX DH — t Output Enable Setup Time OES Output — ...

Page 27

... RESET Hold Time Before Read RH — t Program/Erase Valid to RY/BY Delay BUSY — t Rise Time to V VIDR — t RESET Pulse Width RP Notes: 1. This does not include the preprogramming time. 2. This timing is for Sector Protection operation. MBM29F017A Description Min. Max. (Note 2) Min. ID Min. -70/-90/-12 MB29F017A Unit -70 -90 - ...

Page 28

... MBM29F017A -70/-90/-12 SWITCHING WAVEFORMS • Key to Switching Waveforms High Table Waveforms for Read Operations 28 WAVEFORM INPUTS OUTPUTS Must Be Will Be Steady Steady May Will Be Change Changing from from May Will Be Change Changing from ...

Page 29

... RESET High Table Waveforms for Read Operations MBM29F017A t RC Addresses Stable t ACC Output Valid -70/-90/- ...

Page 30

... MBM29F017A -70/-90/-12 3rd Bus Cycle XXXH GHWL Data Notes address of the memory location to be programmed data to be programmed at byte address the output of the complement of the data written to the device the output of the data written to the device ...

Page 31

... D is the output of the data written to the device. OUT 5. Figure indicates last two bus cycles of four bus cycle sequence. Figure 7 Alternate CE Controlled Program Operation Timings MBM29F017A Data Polling ...

Page 32

... MBM29F017A -70/-90/-12 XXXH GHWL WE Data t VCS V CC Note the sector address for Sector Erase. Addresses = Figure 8 32 XXXH XXXH XXXH WPH AAH 55H 80H AC Waveforms Chip/Sector Erase Operations XXXH ...

Page 33

... CE t OEH WE t OES OE Data DQ = Toggle 6 ( Stops Toggling (The device has completed the Embedded operation). 6 Figure 10 AC Waveforms for Toggle Bit I During Embedded Algorithm Operations MBM29F017A Valid Data t WHWH1 Invalid 0 ...

Page 34

... MBM29F017A -70/-90/- RY/BY Figure 11 RY/BY Timing Diagram During Program/Erase Operations WE RESET RY/BY 34 The rising edge of the last WE signal t BUSY READY Figure 12 RESET Timing Diagram Entire programming or erase operations ...

Page 35

... VLHT VLHT t OESP WE t CSP CE Data t VCS V CC SGA = Sector Group Address for initial sector X SGA = Sector Group Address for next sector Y Figure 13 AC Waveforms for Sector Group Protection MBM29F017A X t VLHT t t WPP VLHT -70/-90/-12 SGA Y 01H ...

Page 36

... MBM29F017A -70/-90/- VIDR t VCS RESET CE WE RY/BY Figure 14 Enter Erase Embedded Suspend Erasing WE Erase Erase Suspend Toggle DQ and with OE Note read from the erase-suspended sector Program or Erase Command Sequence VLHT Unprotection period Temporary Sector Group Unprotection ...

Page 37

... EMBEDDED ALGORITHMS Increment Address Figure 16 MBM29F017A Start Write Program Command Sequence (See Below) Data Polling Device No Last Address ? Yes Programming Completed Program Command Sequence (Address/Command): H/AAH H/55H H/A0H Program Address/Program Data Embedded Programming Algorithm -70/-90/-12 37 ...

Page 38

... MBM29F017A -70/-90/-12 EMBEDDED ALGORITHMS Chip Erase Command Sequence* (Address/Command): Note: To insure the command has been accepted, the system software should check the status of DQ prior to and following each subsequent sector erase command the second status check, the command may not have been accepted. ...

Page 39

... Addr Read Byte (DQ Addr Note rechecked even Figure 18 MBM29F017A Start V = Byte address for programming Any of the sector addresses within the sector being erased during sector erase operation Yes = Any of the sector group address ...

Page 40

... MBM29F017A -70/-90/-12 Note rechecked even changing to “1”. 40 Start Read Byte ( Addr. = “H” or “L” Toggle 6 ? Yes Yes Read Byte ( Addr. = “H” or “L” Toggle 6 ? Yes Fail Pass = “1” because DQ ...

Page 41

... Read from Sector Addr PLSCNT = 25? Data = 01H? Yes Remove V from Protect Another Sector? Write Reset Command Remove V Device Failed Write Reset Command Sector Protection Figure 20 Sector Group Protection Algorithm MBM29F017A -70/-90/-12 Start ) RESET = ...

Page 42

... MBM29F017A -70/-90/-12 Notes: 1. All Protected sector groups unprotected. 2. All previously protected sector groups are protected once again. Figure 21 42 Start RESET = V ID (Note 1) Perform Erase or Program Operations RESET = V IH Temporary Sector Unprotection Completed (Note 2) Temporary Sector Group Unprotection Algorithm ...

Page 43

... MHz A SON PIN CAPACITANCE Parameter Parameter Description Symbol C Input Capacitance IN1 C Output Capacitance OUT C Control Pin Capacitance IN2 Note: Test conditions T = 25° 1.0 MHz A MBM29F017A Limits Unit Typ. Max. — sec — 8 150 — 16.8 40 sec — — Cycles ...

Page 44

... MBM29F017A -70/-90/-12 PACKAGE DIMENSIONS 48-pin Plastic TSOP (I) (FPT-48P-M19) LEAD No. 1 INDEX 24 20.00±0.20 (.787±.008) 18.40±0.20 * (.724±.008) 0.10(.004) 19.00±0.20 (.748±.008) 1996 FUJITSU LIMITED F48029S-2C Resin Protrusion:(Each Side:0.15(.006)MAX) 48 Details of "A" part 0.15(.006) MAX "A" ...

Page 45

... LEAD No. 1 INDEX 24 19.00±0.20 (.748±.008) 0.10(.004) 18.40±0.20 * (.724±.008) 20.00±0.20 (.787±.008) 1996 FUJITSU LIMITED F48030S-2C-2 C MBM29F017A * Resin Protrusion:(Each Side:0.15(.006)MAX) 48 Details of "A" part 0.15(.006) MAX "A" 0.15(.006) 0.25(.010) 25 0.50±0.10 (.020±.004) 0.15±0.10 0.20±0.10 (.006± ...

Page 46

... MBM29F017A -70/-90/-12 (Continued) 40-pin Plastic SON (LCC-40P-M02) * 10.75±0.10(.423±.004) 40 10.10±0.20 (.398±.008) 10.00±0.10 (.394±.004) 1 INDEX 1997 FUJITSU LIMITED C40052S-4C 0.75(.030)MAX (TOTAL HEIGHT 0.05(.002) M Details of "B" part "B" 0.10(.004)TYP 0.05(.002) 0(0)MIN (STAND OFF) 0.50(.020)TYP " ...

Page 47

... Tel: (65) 281-0770 Fax: (65) 281-0220 http://www.fmap.com.sg/ F9903 FUJITSU LIMITED Printed in Japan MBM29F017A All Rights Reserved. The contents of this document are subject to change without notice. Customers are advised to consult with FUJITSU sales representatives before ordering. The information and circuit diagrams in this document are presented as examples of semiconductor device applications, and are not intended to be incorporated in devices for actual use ...

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