MBM29F017A Fujitsu Media Devices, MBM29F017A Datasheet - Page 18

• Manufacturer Part Number: MBM29F017A
• Description: 16M (2M X 8) BIT
• Manufacturer: Fujitsu Media Devices

18
MBM29F017A
Write Operation Status
Notes: 1. Performing successive read operations from any address will cause DQ
DQ
Data Polling
In progress
Exceeded
Time Limits
The MBM29F017A device features Data Polling as a method to indicate to the host that the embedded algorithms
are in progress or completed. During the Embedded Program
produce the complement of the data last written to DQ
an attempt to read the device will produce the true data last written to DQ
Algorithm, an attempt to read the device will produce a “0” at the DQ
Erase
Polling (DQ
Data polling will also flag the entry into Erase Suspend. DQ
mode. Please note that the address of an erasing sector must be applied in order to observe DQ
Suspend Mode.
During Program in Erase Suspend, Data polling will perform the same as in regular program execution outside
of the suspend mode.
For chip erase, the Data Polling is valid after the rising edge of the sixth WE pulse in the six write pulse sequence.
For sector erase, the Data Polling is valid after the last rising edge of the sector erase WE pulse. Data Polling
must be performed at sector address within any of the sectors being erased and not a sector that is within a
protected sector group. Otherwise, the status may not be valid.
Just prior to the completion of Embedded Algorithm operation DQ
enable (OE) is asserted low. This means that the device is driving status information on DQ
time and then that byte's valid data at the next instant of time. Depending on when the system samples the DQ
output, it may read the status or valid data. Even if the device has completed the Embedded Algorithm operations
7
2. Reading the byte address being programmed while in the erase-suspend program mode will indicate logic
3. DQ
4. DQ
TM
“1” at the DQ
Algorithm an attempt to read the device will produce a “1” at the DQ
0
4
7
Embedded Program
Embedded Erase
Erase
Suspended
Mode
Embedded Program
Embedded Erase
Erase
Suspended
Mode
) is shown in Figure 17.
and DQ
is Fujitsu internal use only.
2
1
bit. However, successive reads from the erase-suspended sector will cause DQ
are reserved pins for future use.
Status
Erase Suspend Read
(Erase Suspended Sector)
Erase Suspend Read
(Non-Erase Suspended Sector)
Erase Suspend Program
(Non-Erase Suspended Sector)
Erase Suspend Program
(Non-Erase Suspended Sector)
-70/-90/-12
TM
TM
Algorithm
Algorithm
TM
TM
Table 7
Algorithm
Algorithm
Hardware Sequence Flags
7
. Upon completion of the Embedded Program
7
will switch “0” to “1” at the start of the Erase Suspend
TM
7
Data
Algorithm, an attempt to read the device will
DQ
DQ
DQ
DQ
DQ
may change asynchronously while the output
0
1
0
7
output. Upon completion of the Embedded
7
7
7
7
7
(Note 1)
Toggle
Toggle
Toggle
Toggle
Toggle
Toggle
7
Data
DQ
. During the Embedded Erase
1
7
6
output. The flowchart for Data
6
to toggle.
Data
DQ
0
0
0
0
1
1
1
5
7
at one instant of
Data
DQ
0
1
0
0
0
1
0
7
3
TM
in the Erase
Algorithm,
2
to toggle.
(Note 2)
Toggle
Toggle
Data
DQ
N/A
N/A
TM
1
1
1
2
7