74HCT7273D,112 NXP Semiconductors, 74HCT7273D,112 Datasheet - Page 2

• Manufacturer Part Number: 74HCT7273D,112
• Description: IC OCTAL D FF POS-EDGE OD 20SOIC
• Manufacturer: NXP Semiconductors
• Series: 74HCTr
• Type: D-Type Busr

Specifications of 74HCT7273D,112

• Function: Master Reset
• Output Type: Non-Inverted
• Number Of Elements: 1
• Number Of Bits Per Element: 8
• Frequency - Clock: 56MHz
• Delay Time - Propagation: 16ns
• Trigger Type: Positive Edge
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 20-SOIC (7.5mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Output High, Low: -
• Other names: 568-2902-5; 935024080112

Philips Semiconductors
FEATURES
QUICK REFERENCE DATA
Ground = 0 V; T
Notes
1. C
2. The condition is V
1999 Oct 01
t
f
C
C
SYMBOL
PZL
max
ESD protection:
HBM EIA/JESD22-A114-A
Exceeds 2000 V
MM EIA/JESD22-A115-A
Exceeds 200 V
Ideal buffer for MOS
microprocessor or memory
Eight positive edge-triggered
D-type flip-flops
Common clock and master reset
Output capability: standard (open
drain)
I
I
PD
Octal D-type flip-flop with reset; positive
edge-trigger; open drain outputs
CC
P
f
f
C
R
V
/t
i
o
D
CC
PD
= input frequency in MHz;
L
L
PLZ
category: MSI.
= output frequency in MHz;
(C
= output load capacitance in pF;
= pull-up resistor in M ;
= C
is used to determine the dynamic power dissipation (P
= supply voltage in Volts.
L
PD
V
propagation delay
maximum clock frequency
input capacitance
power dissipation capacitance
CC
CP to Q
MR to Q
V
2
amb
CC
f
2
= 25 C; t
o
) = sum of outputs;
I
n
f
= GND to V
n
i
PARAMETER
+
(C
r
= t
L
f
= 6.0 ns.
CC
V
CC
2
1.5 V.
or data inputs.
The device is useful for applications requiring true outputs only and clock and
master reset inputs that are common to all storage elements.
The 74HCT7273 has open-drain N-outputs, which are clamped by a diode
connected to V
the high-impedance OFF-state. The output may now be pulled to any voltage
between GND and V
DESCRIPTION
The 74HCT7273 is a high-speed SI-gate CMOS device and is pin compatible
with Low power Schottky TTL (LSTTL). It is specified in compliance with
JEDEC standard no 7A.
The 74HCT7273 has eight edge-triggered D-type flip-flops with individual D
inputs and Q outputs. The common Clock (CP) and Master Reset (MR) inputs
load and reset (clear) all flip-flops simultaneously.
The state of each D input, one set-up time before the LOW-to-HIGH clock
transition, is transferred to the corresponding output (Q
A LOW level on the MR input forces all outputs LOW, independently of the clock
or HIGH-to-LOW level shifter. For digital operation and OR-tied output
applications, the device must have a pull-up resistor to establish a logic HIGH
level.
f
o
) + (V
0
C
C
2
/R
L
L
= 50 pF; V
= 50 pF; f = 1 MHz; notes 1 and 2
L
CC
)
. When a HIGH is clocked in the flip-flop, the output comes in
2
duty factor LOW where:
Omax
D
in W).
. This allows the device to be used as a LOW-to-HIGH
CC
CONDITIONS
= 4.5 V
n
16
23
56
3.5
37
Product specification
TYPICAL
) of the flip-flop.
74HCT7273
ns
ns
MHz
pF
pF
UNIT