sch5617c Standard Microsystems Corp., sch5617c Datasheet

sch5617c

Manufacturer Part Number

sch5617c

Description

Desktop System Controller Hub With Advanced, 8051?c-based Auto Fan Control

Manufacturer

Standard Microsystems Corp.

Datasheet

1.SCH5617C.pdf (5 pages)

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PRODUCT FEATURES

SMSC SCH5617C

ACPI 2.0 Compliant

High Performance 8051

PECI Interface

Temperature Monitor

PROCHOT_IN# Pin

PROCHOT_OUT Pin

Auto-Fan Control with ProcHot Features

— 2.5X average instruction execution speed improvement

— Faster clock speed: 32 MHz vs. 16 MHz in standard

— Dual Data Pointers

— More Interrupts: Power-Fail, External Interrupt 2,

— A set of External Memory/Mapped Control Registers

— 384 Bytes of RAM as part of the 8051 core

— 4k Bytes Data RAM (869 bytes may be used to patch

— Twelve Interrupt Sources

— Watch Dog Timer (WDT)

— Supports PECI REQUEST# and PECI AVAILABLE

— Monitoring of up to Two Remote Thermal Diodes

— Supports temperature readings from -63 degrees to

— 1/8th degree temperature resolution

— Internal Ambient Temperature Measurement

— Limit Comparison of all Monitored Values

— Mapped into Temperature monitoring interrupt

— May be used to adjust fan control limits

— May be configured to force fans on full

— PWM (Pulse width Modulation) Outputs (3)

— High Frequency PWM Options (15kHz up to 30kHz)

— 2 second delayed start-up for PWM outputs

— Fan Tachometer or Lock Rotor Inputs (3)

— Programmable linear automatic fan control based on

over the entire instruction set; i.e., typical 4-clock

instruction cycle in high-performance 8051 vs. 12-clock

instruction cycle in standard 8051.

8051.

External Interrupt 3, etc.

provides the 80C51 core with the ability to directly

control many functional blocks of the SCH5617C.

ROM code)

signalling

+192 degrees

generation logic

temperature

– Supports monitoring of discrete diodes (3904 type

– Supports monitoring substrate diodes (45nm &

– Legacy PWM control dc fan outputs

diodes)

65nm processor diodes)

PRODUCT PREVIEW

Internal Ring Oscillator for VTR Powered Logic

Low Battery Warning

LED Control

SMBus Isolation Logic

Programmable Wake-up Event Interface

PC2001 Compliant

General Purpose Input/Output Pins (30 Host

21 Dedicated Scratchpad registers

ISA Plug-and-Play Compatible Register Set

System Management Interrupt

GLUE Logic

2.88MB Super I/O Floppy Disk Controller

— Acoustic enhancement mode

— ProcHot pins modulate Tmin

— Fan PWM duty cycle is a function in linear mode of

— PWM Ramp Rate Closed Loop Control

controlled, 16 8051 controlled)

— IDE Reset/Buffered PCI Reset Outputs

— Power OK Signal Generation

— Power Sequencing

— Power Supply Turn On Circuitry

— Resume Reset Signal Generation

— Hard Drive Front Panel LED

— Licensed CMOS 765B Floppy Disk Controller

— Software and Register Compatible with SMSC's

— Supports Two Floppy Drives

— Configurable Open Drain/Push-Pull Output Drivers

— Supports Vertical Recording Format

— 16-Byte Data FIFO

— 100% IBM® Compatibility

— Detects All Overrun and Underrun Conditions

— Sophisticated Power Control Circuitry (PCC) Including

— DMA Enable Logic

— Data Rate and Drive Control Registers

— 480 Addresses, Up to Eight IRQs, and Four DMA

— Enhanced Digital Data Separator

Desktop System

Controller Hub with

Advanced, 8051µC-Based

Auto Fan Control

SCH5617C

multiple temperatures and ProcHot signals

Proprietary 82077AA Compatible Core

Multiple Powerdown Modes for Reduced Power

Consumption

Options

– 2 Mbps, 1 Mbps, 500 Kbps, 300 Kbps, 250 Kbps

– Programmable Pre compensation Modes

Data Rates

Revision 0.7 (12-09-08)

Data Brief

Related parts for sch5617c

sch5617c Summary of contents

Page 1

... External Interrupt 3, etc. — A set of External Memory/Mapped Control Registers provides the 80C51 core with the ability to directly control many functional blocks of the SCH5617C. — 384 Bytes of RAM as part of the 8051 core — 4k Bytes Data RAM (869 bytes may be used to patch ROM code) — ...

Page 2

... Modem Control Circuitry — 480 Address and 15 IRQ Options SCH5617C-NS FOR 128 PIN, QFP LEAD-FREE ROHS COMPLIANT PACKAGE 80 ARKAY DRIVE, HAUPPAUGE, NY 11788 (631) 435-6000, FAX (631) 273-3123 Copyright © 2008 SMSC or its subsidiaries. All rights reserved. Circuit diagrams and other information relating to SMSC products are included as a means of illustrating typical applications. Consequently, complete information sufficient for construction purposes is not necessarily given ...

Page 3

... Desktop System Controller Hub with Advanced, 8051µC-Based Auto Fan Control General Description The SCH5617C is a 3.3V PC 2001 compliant Super I/O controller with an LPC interface. All legacy drivers used for Super I/O components are supported making this interface transparent to the supporting software. The LPC bus also supports power management, such as wake-up and sleep modes ...

Page 4

... WITH WRITE VERTICAL PRECOM- FLOPPYDISK PENSATION CONTROLLER CORE RCLOCK RDATA RDATA#, MRT0#, MRT1#*, TRK0#, WDATA# INDEX#,WRTPRT#,WGATE#, HDSEL#,DRVDEN0*, DIR#, STEP#, DSKCHG#,DS0#, DS1#* Figure 1 SCH5617C Block Diagram 4 PRODUCT PREVIEW SECONDARY_HD#* PRIMARY_HD#* SCSI#* HD_LED#* LED2* LED3* LEDs LED1* PD[7:0] BUSY,SLCT,PE Multi-Mode ...

Page 5

Package Outline Figure 2 128-Pin QFP Package Outline (3.9mm footprint) ...

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