cy28446 Cypress Semiconductor Corporation., cy28446 Datasheet - Page 6

• Manufacturer Part Number: cy28446
• Description: Clock Generator For Intel Calistoga Chipset
• Manufacturer: Cypress Semiconductor Corporation.

Document #: 001-00168 Rev *D
Control Registers
Byte 0: Control Register 0
Byte 1: Control Register 1
Byte 2: Control Register 2
Bit
Bit
Bit
5
4
3
2
1
0
7
6
5
4
3
2
1
0
7
6
7
6
5
4
3
2
1
0
@Pup
@Pup
@Pup
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
1
1
1
1
1
1
1
1
CPU2_ITP[T/C]/SRC7[T/C] CPU2_ITP[T/C]/SRC[T/C]7 Output Enable
CPU PLL Spread Enable PLL1 (CPU PLL) Spread Spectrum Enable
DOT_96[T/C]
CPU[T/C]1
CPU[T/C]0
Reserved
Reserved
Reserved
Reserved
Reserved
SRC[T/C]6
SRC[T/C]5
SRC[T/C]3
SRC[T/C]2
SRC[T/C]1
SRC[T/C]0
USB_48
Reserved
PCIF0
Name
Name
REF
PCI3
PCI2
PCI1
PCI0
Name
PCIF0 Output Enable
0 = Disable, 1 = Enable
DOT_96 MHz Output Enable
0 = Disable (Tri-state), 1 = Enable
USB_48 Output Enable
0 = Disable, 1 = Enable
REF Output Enable
0 = Disable, 1 = Enable
Reserved
CPU[T/C]1 Output Enable
0 = Disable (Tri-state), 1 = Enable
CPU[T/C]0 Output Enable
0 = Disable (Tri-state), 1 = Enable
0 = Spread off
1 = Spread on (–0.5% spread spectrum on CPU/SRC/PCI clocks)
Reserved set to 1
Reserved set to 1
PCI3 Output Enable
0 = Disable, 1 = Enable
PCI2 Output Enable
0 = Disable, 1 = Enable
PCI1Output Enable
0 = Disable, 1 = Enable
PCI0 Output Enable
0 = Disable, 1 = Enable
Reserved set to 1
Reserved set to 1
0 = Disable (Tri-state), 1 = Enable
SRC[T/C]6 Output Enable
0 = Disable (Tri-state), 1 = Enable
SRC[T/C]5 Output Enable
0 = Disable (Tri-state), 1 = Enable
Reserved
SRC[T/C]3 Output Enable
0 = Disable (Tri-state), 1 = Enable
SRC[T/C]2 Output Enable
0 = Disable (Tri-state), 1 = Enable
SRC[T/C]1 Output Enable
0 = Disable (Tri-state), 1 = Enable
SRC[T/C]0 Output Enable
0 = Disable (Tri-state), 1 = Enable
Description
Description
Description
CY28446
Page 6 of 21
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